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Hardware Design And Application Of Scheduling Module In OBS Network Edge Node

Posted on:2010-02-20Degree:MasterType:Thesis
Country:ChinaCandidate:R GuoFull Text:PDF
GTID:2178360272478921Subject:Signal and Information Processing
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Nowadays, with the development of WDM (Wavelength Division Multiplexing), optical burst switching technology is emerging as a promising way to deal with the Electronic bottleneck effectively in communication networks. To some extent, it determines the development of all-optical communications. Scheduling technology is one of the important mechanisms to solve wavelength channel distribution and packet loss rate reduction. Therefore, the study of scheduling technology has great significance.The main topic of this paper is scheduling technology in optical burst switching networks. This solution is implemented in a FPGA chip in series of CYCLONE II from Altera company. By adopting the latest available unscheduled channel (LAUC) algorithm, the function of channel assignment can be realized in optical burst switching networks. This paper can be divided into three aspects:(1) Analyzing and comparing the performance of packets loss rate, meanwhile, simulating some basic scheduling algorithms such as LAUC and LAUC-VF. According to the complexity of each algorithm, LAUC algorithm is selected to accomplish the function of schedule module.(2) Presenting a modularization hardware solution of data schedule modular based on Quartusâ…ˇ6.0. The Round-Robin algorithm is adopted to acquire the burst request. Searching each unscheduled time slot from the time table of resources reservation by adopting the latest available unscheduled channel (LAUC) algorithm, the channels can be properly chosen for the requests. Meanwhile, maintaining the performance of FPGA, in the sequential digital logic design utilized abundant sequential resources in the FPGA just as FIFO and counter.(3) It is compiled and synthesized with quartusâ…ˇ, the used LEs of FPGA is 18%, the speed of module is 61MHZ, the longest scheduling time is 800ns. On aspect of system debug, JATG is selected as the Configuration Mode of FPGA. The module is verified with FPGA. The result on an oscillograph consistent with simulation, which show the feasibility of design. The design of corresponding interface for other OBS module definitely show the expansibility of the module.
Keywords/Search Tags:optical burst switching, scheduling, round-robin, resources reservation, FPGA
PDF Full Text Request
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