| As the application field of the processing technology of digital image become enlarging, the higher image quality are required, especially how to reduce noise but preserve image details using image smoothing method. Morever, because of the fast development of VLSI and the application of high integration and low cost FPGA, the system of high-speed digital image processing can be designed based on such hardware platform. For the high agility of FPGA, rich resources and the use of IP core, FPGA is suitable for image processing of pixel scale. The image processing system based on FPGA has the characteristics of low cost, miniaturization, and real time.This paper firstly expounds the smoothing arithmetic in image enhancement, containing neighborhood averaging, median filtering, and adaptive filtering, and then we propose the modified median filtering. Secondly the smoothing system is mainly set up based on the chip of EP1C20 of Altera company, containing two pieces of SRAM, VGA interface and EPCS4. The system is constituted by smoothing model, VGA displaying control model and SRAM read-written control model. According to FPGA design process, all the models are written by Verilog HDL, and then are simulated and debugged on QuartusII and Modelsim software platform. The effects of median filtering and modified median filtering are compared in waveform simulation, FPGA resources consumption and image display. At the end of this paper we certificate the timing of VGA by displaying 8-color bars on VGA monitor. |
