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Optimization Of The Finite State Machine Based On I~2C BUS And Design Of A GPIO Expander

Posted on:2008-12-29Degree:MasterType:Thesis
Country:ChinaCandidate:S ChenFull Text:PDF
GTID:2178360272468999Subject:Software engineering
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Nowadays, the mobile phone market is one of the hottest globe electronic products market. Varied types of mobile phones with different functions, which have brought substantive profit to the companies, take huge challenge in designing. To solve the interface problem of main body of the mobile phones and its cover, there is a way which is using serial bus. In that case, GPIO expander is born.In this dissertation, based on the expander's structure, an optimized design of low power, small area expander with I2C bus will be discussed. The discussion start from interface module design, whose finite state machine (FSM) will be deeply researched and optimized. A new method that use shift registers as a counter to control the FSM transfer has been put forward. It will reduce the states of the FSM so that the power and area will be cut down as well. And then an advanced interface module with I2C bus has been designed in which the power has disposed 10%, and the area has been 30% smaller than before.Finally an expander with the function of pulse width modulation (PWM) is design using the new interface module which using the advanced FSM. The expander could be used no only as a GPIO expander but also as a LED display controller. It provides 2 optional PWM waves. The bound of wave frequency is form 40Hz to 0.15625Hz, while the pulse width is from 0% to 99.6%. Each of them can be programmed in 256 different values.
Keywords/Search Tags:finite state machine, I~2C bus, GPIO expander, PWM
PDF Full Text Request
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