Multiplier Based On Finite State Machine Design And Implementation

The multiplier is the important component in many modern electrondevices such as the central processor, Digital Signal Processor (DSP), filter, andso on. Especially in the DSP, the processing speed is almost decided bymultiplier’s speed. Therefore, the multiplier’s performance plays an importantrole in the whole computing system. Optimizing the multiplier’s structurebecame the critical operation of improving the whole performance of thecomputing system. The Finite State Automaton (FSA), which can describe theevents clearly with a logic and timing sequence, was introduced in this thesis todesign the multiplier. Based on the finite state automaton, a Parallel RowBypassing (PRB) multiplier and a Truncation Array-multiplier based on FiniteState Automaton (FSATA) multiplier was designed separately. The main workis as follows:(1)The row bypassing multiplier was realized based on finite stateautomaton. The experiment result showed that the FSA based multiplier usedlesser logic components and reduced the power while ensuring the computingspeed.(2)PRB multiplier was proposed based on row bypassing multiplier andwas realized by finite state automaton. To make all products be produced inparallel and improve computing speed, the multiplicator was recoded. Every twobit was taken as a whole which were the multiplex’s output control signal and allproducts were the input signal. The experimental results which were simulatedin Quartus showed that the design which was realized by the finite stateautomaton had a better effect in terms of power, delay and total logic elements.(3)To realize a effective trade-off among power, chip area and computingdelay which are three important parameters impacting array multiplier designing,a FSATA multiplier was proposed based on finite state automaton. Themultiplying is actually a series of add operations. The proposed design wasbased on the truncation of most significant bits from the multiplicand and themultiplicator in order to produce all products more flexible. The new design which was realized by finite state automaton, encoded by VHDL, synthetisedand simulated in Quartus, had a better computing speed than the design that wasrealized by sequence circuit.