Filter-VGA Design For OFDM UWB System

UWB(Ultra-Wide Band) technology is becoming more and more popular in recent years because of its high data-rate and low power dissipation for short distance wireless communications. It is a key solution of WPAN (Wireless Personal Area Network) with data-rate of max. 480Mb/s and min. 110Mb/s. Along with the progress of CMOS technology, the cost of the RF front-end is decreasing while the performance is improving, which makes it a trend to implement UWB front-end with CMOS technology.In this thesis, a full CMOS Filter-VGA for UWB systems is presented. Filter is based on Gm-C biquad and VGA is realized in source degeneration enhanced amplifier. The chip is fabricated in Jazz 0.18μm CMOS process, post simulation results shows that the Filter-VGA meets the demand of UWB systems.The specification of the Filter-VGA is introduced on system level. On the basis of MB-OFDM UWB systems, the linearity and NF specification of the Filter-VGA is discussed in details. Then the conventional architectures of Filter-VGA are introduced and compared with each other, the most suitable architecture is chosen at last.According to general design flow, a 5^th order Chebyshev approximation Gm-C Filter is designed. Because the Filter's linearity is limited by the OTA's linearity, Pseudo differential OTA is introduced in order to maximize the linearity. The OTA's linearity is deduced in details then and Gm-C biquad filter is designed with this OTA. With analyzing the OTA's non-ideal effect, the cutoff frequency and Q factor of the filter is optimized. Then the 5^th order Chebyshev filter for UWB systems is designed with one 1^st order passive filter and two biquad low-pass filters.In the VGA design section, enlarging bandwidth and gain controlling are the main topics. The linearity of VGA is also discussed because its open loop configuration. DCOC (DC Offset Calibration) circuit, working as DC negative feedback, is added into the Filter-VGA, it makes a low DC gain of the Filter-VGA in order to minimize the DC offset and make the circuit work properly. The DCCA (Digital Controlled Capacitor Array) and auto-tuning circuits are also discussed in order to adjust the cutoff frequency in term of any variations. The DCCA is used in the chip which is controlled by read-write circuit. Auto-tuning circuit is simulated and the results show it can work properly.