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FPGA-Based Joint Servo Controller Bus Technology

Posted on:2009-07-31Degree:MasterType:Thesis
Country:ChinaCandidate:T FengFull Text:PDF
GTID:2178360245469666Subject:Detection Technology and Automation
Abstract/Summary:PDF Full Text Request
With the advancement of technology and development of robots in the production of human life in playing an increasingly important role, especially in space, underwater and other special occasions, the robot is to play an important role These occasions the harsh environment of the robot control system has high reliability requirements. The system bus is the robot system as an important component of the reliability of the whole robot reliability of the system and play a vital role. This thesis on the high reliability of the bus system redundancy explore and study, from the physical layer is given to senior link layer, from theory to practice analysis, design and implementation.With the superiority of CAN Bus widely recognized by the people, CAN bus technology application endless,. In this thesis, take full advantage of the many features CAN Bus Design and Implementation of the robot used in the servo control system redundancy reliable and efficient CAN Bus network.The thesis first on the bus on hardware redundancy way, a FPGA-based fully redundant bus architecture, also proposed an integrated CAN bus in the dynamic IP priority algorithms to enhance the text on scheduling , with minimal overhead and avoid the busy network communication, to give priority to the low level of "deadlock". Then in order to better improve the bus system's reliability, according to the sliding window and automatic-response method, a highly efficient redundant CAN fault detection and switching mechanisms, and proposed text was used in large quantities dual CAN Transmission mode, and give full play dual redundant CAN bus bandwidth advantages. Eventually, an integrated design of fault-tolerant switching mechanism CAN Bus IP, with SOPC means to achieve the joint servo controller and CAN bus systems integration, improve the system of internal integration, reducing the size of the weight and improve the overall reliability, and Bus structures of the test environment, the actual bus system performance was verified.
Keywords/Search Tags:CAN, FPGA, fault-tolerant, real-time, joint servo controller
PDF Full Text Request
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