Font Size: a A A

Study Of Lower-Power Scheduling Techniques In Fault-Tolerant Real-Time Embedded Systems

Posted on:2009-08-21Degree:MasterType:Thesis
Country:ChinaCandidate:H J ChenFull Text:PDF
GTID:2178360242998966Subject:Computer Science and Technology
Abstract/Summary:PDF Full Text Request
With the increasing applications of embedded systems, power consumption and reliability of real-time embedded systems have been attracting much attention in academe and engineering circles. Lower power & energy and fault tolerance are of significance in the design of real-time embedded systems, and in the past, they are viewed as two independent research domains all along. However, for many real-time embedded systems in such applications as defense, space and consumption, both the power consumption restrict and fault tolerance are required. Moreover, some recent researches reveal that there are some conflicts between the optimization on power consumption and the need of fault tolerance. Thus, the unity of fault tolerance and low power will be of real significance and application value. Recently, some overseas scholars begin the united research of the two problems, which incurs increasing attention in academe.The unity of fault tolerance and low power can implement on different levels. Since many embedded real-time systems are subject to system resource, the fault tolerance technology and low power technology in system level need lower cost, have high flexibility and high efficiency. According to these characteristics, in this paper the task scheduling is investigated in order to lower power in fault tolerant real-time embedded systems. The main work and contribution are as follows:Firstly, the present research on tradeoff between lower power design and fault tolerance focus on checkpointing and dynamic voltage scaling (DVS). Much literature only dealed with time cost of checkpointing. After research on the principle of checkpointing, the makeup of dynamic power and the principle of DVS, a conclusion is got that sometimes the power consumption of checkpointing must be considered. A power consumption model of checkpointing is setup, based on which a scheme for energy saving and fault tolerance based DVS and checkpointing is improved. Then, the effect of power consumption on the optimal number of checkpoint and the efficiency of energy saving are disscussed.Secondly,in present scheduling scheme of combinating DVS with fault tolerance , off-line scheduling is easy to implement and needs fewer overhead, but is too pessimistic in terms of utility, while on-line scheduling highly effectively use system slack but its computation cost and complexity are high. A quasic-static scheduling scheme different from most of others is proposed in this paper, which obtain the performance of near on-line scheme with fewer time cost. Moreover, in the scheme proposed here, the effect of DVS itself on soft error rate is considerated and tasks in the new scheme can have different reliability requirements, which approach the real applications. Finally, the energy supply is usually constrained in embedded systems. To improve energy efficiency or optimize system performance is a hot subject in present research domain of low power in real-time systems. In this paper, real-time fault tolerant scheduling based on ICM when energy is constrained is investigated, and a new scheduling method is proposed to better the system performance. The new method selects the optional part of the task in light of priority of energy density offline, which can optimize system performance. By the dynamic reclaiming algorithm, the system performance is further improved at run-time with surplus energy.
Keywords/Search Tags:real time systems, embedded systems, fault tolerance, lower power, task scheduling
PDF Full Text Request
Related items