Energy-efficient fault-tolerance schemes for multi-core hard real-time systems

As technology advances towards the deep submicron devices, all digital systems are expected to be remarkably vulnerable to single event upset (SEU)-induced transient faults with the continuous shrinking of the feature size and reducing of the threshold voltage. However, for the current rate of transient fault arrival, fault occurrences are expected to remain infrequent in the foreseeable future and fault-free operation will continue to dominate, which necessitates designing hard real-time embedded systems assuming no fault occurrences while maintaining the schedule timeliness when faults occur in burst.;This dissertation explores the joint optimization of fault-tolerance and energy in addition to timeliness for fixed-priority-based hard real-time embedded systems. For uniprocessor systems, two low-cost offline scheduling schemes with varying granularity of dynamic voltage scaling (DVS) policies are designed that enable the dynamic extensions of the offline schedules to adapt to the runtime behavior of fault occurrences. The optimality, complexity, fault-tolerance, and energy consumption of the proposed schemes are investigated and compared with those of the state-of-art optimal schemes. Two dynamic scheduling schemes that re-evaluate DVS policies at runtime to achieve energy savings are also devised.;Energy-efficient task allocation and scheduling schemes with deterministic fault-tolerance capabilities for symmetric multiprocessor or multi-core hard real-time systems aim at achieving optimum energy savings in the absence of faults and meeting application timing requirements in the worst case faults at the cost of energy inefficiency. A novel task allocation scheme with proven optimal load-balancing property is designed for optimum energy savings, and an optimistic fault-tolerance task allocation and scheduling scheme is proposed to achieve optimum energy savings in reliable hard real-time multiprocessor systems.;Finally, a real-life test bed comprising Intel Core Duo T2500 processor with DVS capability and running Linux Fedora 8-based hard real-time scheduling has been developed, and the proposed energy-efficient fault-tolerance task allocation and scheduling schemes are implemented and validated on the test bed. The experimental results on the test bed are reported and the discrepancies between the experimental results and simulation results are investigated.;As a whole, this dissertation investigates and justifies the designing of energy-efficient fault-tolerance hard real-time systems for the best case of fault occurrences without compromising the schedule timeliness. The research results show that this design strategy is particularly promising for emerging applications where timeliness, fault-tolerance, and energy dimensions need to be simultaneously addressed.