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The Design Of Advanced FLASH Memories With Nano-Crystals Floating-Gate

Posted on:2009-02-05Degree:MasterType:Thesis
Country:ChinaCandidate:S H ZhouFull Text:PDF
GTID:2178360242990273Subject:Electronics and Communications Engineering
Abstract/Summary:PDF Full Text Request
With the development of the integrated circuits and scaling down of the feature size, the new generation of semiconductor memories emerges continuously. It is expected that conventional flash memories would be replaced by the memories based on nanocrystals in the near future. For the present device structure, however, there inherently is a contradiction between the operating voltage and the retention time. In order to optimize the storage characteristics, we propose a novel structure of memory cell—Ge/Si quantum-dots floating-gate structure. By analyzing the tunneling characteritics of the staircase potential barrier, it has been demonstrated that the staircase potential barrier does result in the single direction dependence of electricity. Consequently, the retention of the memory is improved substantially. Moreover, the operation principle and time characteristics of the memories based on Ge/Si quantum-dots floating-gate structure have been investigated in detail.On the basis of analyzing the potential configuration of silicon nanocrystals based memory and the mixing effect of the valence band, the calculational model for the direct tunneling times of electron and hole is exhibited using the sequential tunnel theory and Bardeen's transfer Hamiltonian formalism. The programming and retention times of silicon quantum-dots floating-gate memory are calculated numerically, and some influences of the structure and the bias to the performance of device are discussed. It is noted that the new device model should be presented to improve the retention property of silicon quantum-dots floating-gate memory.Time characteristics of the n-channel memories based on Ge/Si quantum-dots floating-gate structure are first stimulated numerically. Under operating at low voltage, it is shown that the programming of the n-channel memories based on Ge/Si quantum-dots floating-gate structure with thin tunneling oxides can achieve in orders of ns. The retention time can remarkably be modulated by the heights of the Si quantum-dots, while the writing/erasing change slightly. Due to staircase barrier, the retention time of the n-channel memories based on Ge/Si quantum-dots floating-gate structure has been improved in 3 orders, compared with the memories based on Si nanocrystals.Due to the high valence band offset and staircase barrier, moreover, the memory based on Ge/Si quantum-dots floating-gate structure can work more effectively in the case of p-channel devices. The numerical simulation on the characteristics time has been carried out, and the results are compared with the memory based on conventional Si nanocrystals and the n-channel memory based on Ge/Si quantum-dots floating-gate structure. It is shown that the programming can be achieved in the order ofμs and the retention time can be ten years (about 108 sec). In conclusion, the p-channel memory based on Ge/Si quantum-dots floating-gate structure could be expected to be an excellent nonvolatile memory cell.
Keywords/Search Tags:Ge/Si, Quantum-dots, Flash memory, MOSFET
PDF Full Text Request
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