Self-Reconfiguration Techniques For VLSI Arrays

To enhance the stability and reliability of VLSI (Very Large Scale Integration) systems, fault-tolerant techniques are normally employed in VLSI arrays. Generally, two methods for reconfiguration, namely, the redundancy approach and the degradation approach, are employed in fault-tolerant techniques for VLSI arrays. There are mainly three targets for reconfiguration, finding maximal-sized target array, finding high performance target array and fast reconfiguration.This paper discusses the problem of reconfiguring a degradable VLSI array based on the degradation approach, to obtain a target array with high performance. A reconfiguration algorithm named LR_GCR has been presented based on the GCR algorithm. The process of the algorithm was also described. Experimental results show that the proposed LR_GCR algorithm effectively decreases low performance interconnects in the target array compare with the older algorithm named GCR, and the performance of the target array was improved obviously. The hardware architecture of the LR_GCR algorithm was also considered and described in the paper.