Design Of Wide Tuning Range And Low Power CMOS VCO

As an essential component of most of electronic systems, VCO is the core of PLL in communication system. The performance of VCO greatly impacts on the overall performance of PLL. Low power, Low noise feature and wide tuning-range is the concentrated topics of VCO's design presently.Based on the thorough study on the theory and design technique of VCO, this dissertation provides the design methods of VCO to achieve 500MHz-2GHz tuning range and gives contrastive analysis of them. The main idea of design is to employ current steering architecture that take the advantage of Gm of MOSFET to convert the control voltage to the bias current of ring oscillators. This method can achieve extremely wide tuning range of frequency under low supply voltage while the VCO consumes very low power. Two specific implementations are presented: the first one is the common Current-starved ring oscillator; the other one is CSA (Current-steering Amplifier) ring oscillator VCO. Current-starved ring oscillator has a very simple structure, very wide tuning range and small physical area. But it is so sensitive to the noise on the supply voltage that the phase noise (or jitter) performance of Current-starved ring oscillator is poor. CSA ring oscillator VCO has a relatively low sensitivity to supply voltage due to its cascade structure. Also CSA VCO has a good tuning linearity within the most part of tuning range.The main work of the dissertation is: the circuit design and performance optimization of VCO under low supply voltage and VDSM(very deep sub-micron)technology; Improvement of bias circuit to adjust VCO tuning-sensitivity and linearity. Then analyze the performance (such as tuning-range, linearity, noise, power) of the two kinds of VCO by contrast their simulation results. The Current-starved ring oscillator has been embedded in PLL core and fabricated in SMIC 90nm CMOS process. The test plan and result are presented at the end of the article.