Design Of FPU Exception Handling And Verification Of FPU In X Microprocessor

X microprocessor is a CISC one with high performance, whose Floating-Point Unit has very strong numerical calculating and handling capacity. The FPU supports the function defined in the IEEE754-85 standard such as the data types, basic operating function, the way of rounding and the way of accuracy controlling. Floating Point exception handling is one of the main parts that assure Floating Point Unit to work normally,and it is the key point and difficult point in the design and verification. The verification of the Floating Point Unit is an important step in X microprocessor's design.This paper design the architecture and some functional units of FPU in X microprocessor based on studying the characteristic of X microprocessor architecture ,the floating point handling in microprocessor and the IEEE754-85 standard. And based on the study of the floating point exception and the characteristic of floating point pipeline,this paper also raises a circuit of exception examination. This exception examination circuit includes four parts such as the safe instruction recognition, the examination of stack mistake, the examination before operation and the examination behind operation.In order to assure the validity of the FPU design, this paper verifies the design through the verification of module level ,system level and structure level. In this verification, the data paths are full covered and the controlling paths are covered with high coverage rate. The simulation result indicates that the design of this FPU meets the demands.Achievements of the research can be directly applied to the operation of the microprocessor, which embraces practical significance, and accumulates experiences in the technology and theory of the full custom design, as well.