Research And Development Of Video Display System And Driving Circuits Of Shadow Mask PDP

Multistandard digital video signal conversion is an important technology in display system of Plasma Display Panel structure with Shadow Mask (SM-PDP). This paper presents a solution of the converting different digital video signal standard to one pixelated digital video signal streams with fixed frame rate that is suitable for flat display panel, like SM-PDP, and put forward a design of data storage control and drive sequence control to the SM-PDP display circuit.Refer to a number of methods that are widely used today in digital video signal processing, a set of methods that can be implemented with FPGA are optimized. A adaptive control interpolation algorithm based on motion detection is presented to process de-interlacing.For frame rate convertion, the nearest frame is copied to interpolation for still image, for motive image motion vector interpolation and adaptive motion compensation are respectively used. A method based on data separating is put forward to control the SM-PDP data storage. The drive sequence control is realized by FPGA.All these processing methods have been designed with VHDL, and verified with MAX_PLUS II. The simulation results correspond with the expected results, so the digital video standard conversion and the SM-PDP display control system was implemented correctly in software simulation.Besides, the conversion of interlaced video signal to progressive video signal with a fixed resolution of 852×480 has also passed the hardware test, the test board has a video decoder SAA7118, a FPGA EP1K100 and four 256k×16bit SRAM IDT71V416.