System Power Management Based On Garfield Processor

Modern micro-processors normally provide advanced power management function, and rapid development of micro-electronic technology makes the chips'power consumption drop dramatically, however, facing limit power supply of battery, system's requirement for low power consumption has never been neglected in the field of portable device. With more and more advanced function being integrated into the portable devices, people are attaching more importance for the system lower power consumption.Based on Garfield a type of Personal digital Assistant (PDA) was developed. Software power management proposal in system level is required to reduce its power consumption.To begin, the paper introduces relevant lower power management technologies and the present situation in research of power management scheme. Then, we make good understand of the system platform. On basis of these works, we defined system power management model and power management scheme (static time-out scheme). After that, the system specific application characteristic and the running process of system multi-task is analyzed carefully, from that we defined the conditions of system power states transition and the transition process between states. We also give a detailed elaboration of dynamic management scheme of modules inside the processor, at the same time; the realization of the system sleep and wake-up is introduced in detail. Special solution also was also given to large power-consuming devices.After realization of the solution, we conducted test and verification experiment on real board. The results indicate that system can run in different states for different requirement, most of the modules and devices can be managed dynamically, which make the system consume much less power than before.