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Design And Implementation Of FFT Processor In Real-time SAR Imaging SoC

Posted on:2005-02-03Degree:MasterType:Thesis
Country:ChinaCandidate:B FuFull Text:PDF
GTID:2178360185995537Subject:Computer system architecture
Abstract/Summary:PDF Full Text Request
Discrete Fourier Transform (DFT) plays an important role in signal processing. It has been applied in a wide range of fields such as communication systems, image processing and radar imaging systems. As new applications and SoC appearance, the performance and reusability of FFT processors become more important than ever. The time of available FFT processors computing a 1024-point complex transform varies from several tens microsecond to more than one hundred microsecond, which make it impossible to be used in real-time system. How to design a high-speed and reusable FFT processor becomes a key question of improving systems performance.In this thesis, a method of designing high-speed, fixed-point, reconfigurable FFT processor with adaptive overflow control is presented. The main contributions are listed as follow: 1. A new mixed-radix address generator based on radix 4+2. The method can simultaneously access to all the data needed for calculation of one mixed-radix butterfly in each clock cycle, which improves the parallelism of FFT processor and costs less hardware resource than multiple pipeline FFT processor. 2. Reconfigurable architecture with adaptive overflow control. The method can dynamically select different length FFT operation, which is very useful in many applications. The method can also solve the overflow problem without interrupting the pipeline of computing. The efficiency of the pipeline is almost 100 percents. 3. Reusable architecture. IP reuse is of most importance in SoC design. In this thesis, the FFT processor is divided into interface circuit and kernel logic, which make it easy to use the FFT processor in different platforms.The FFT processor is implemented on a Xilinx chip XCV2P30 and obtains the operating clock frequency at 130MHz. The processor can compute a complex 1024-point FFT within 9.8us and 16384-point FFT within 221us. A FFT array composed of the processors we have designed is used in SAR real-time imaging SoC.
Keywords/Search Tags:FFT processor, SoC, IP reuse, Address mapping algorithm, Adaptive overflow control, Asynchronous circuits
PDF Full Text Request
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