Intelligent Answering System Implementation Based On SOC

Based on prolific experience and knowledge of Application Specific Integrated Chip (ASIC) design and combined with the advanced design method - System On a Chip (SOC), this paper describes the whole design flow of a project in a project manager's point of view. The method of designing hardware system using Hardware Description Language (HDL), the design flow of TOP-DOWN methodology, and the combination of the system's overall design and testing planning are described.Intelligent Answering System chip includes embedded MPU(Micropresessor Unit), embedded memory devices and embedded functional block, implementing tele-control, answering, messages recording and forwarding, and caller ID functions by Hardware-Software Co-Design. It also contains communication port for interfacing with PC.This chip achieves one of its innovations by developing and implementing an ASIC solution of a voice compression and de-compression algorithm, the Feature Vector Quantization Based on Voice Model of Energy Fluctuation (FVQBVMEF), with own Intellectual Property (IP). The performance/price ratio is much better than the traditional solution using Digital Signal Processor (DSP).This project has entered its back-end design phase, the first version of a demo system on the Programmable Logic Devices (PLDs) board had been developed.