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DFT Study Of Digital Circuit Based On LASAR

Posted on:2007-03-02Degree:MasterType:Thesis
Country:ChinaCandidate:T ZhengFull Text:PDF
GTID:2178360185493958Subject:Circuits and Systems
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Of late years, the electronic circuit technology has developed in a high speed, which complicates the structure and function of electronic equipments. So circuit board testing plays a more and more important role in the design of circuits or systems, while the cost of testing keeps rising higher. It has been proved that it's useless to test a circuit with no testability. Thus, we have to consider the testing problems at the stage of circuit design. And it is necessary to study the DFT(Design For Testability).There are some common methods of design for testability, such as boundary scan test and so on. Using that methods usually have to add some additional circuit and control logic. That makes the circuit more complicated. While as the development of fault diagnosis technology, some professional tools can be used to do simulation of the circuit to be tested. So that the testability analysis can be done by some special software when the circuit is still being designed.The software LASAR is such a simulation system. It is used to accomplish the digital circuit testing and logical analyzing. There are four steps of the simulation with LASAR. They are model compilation, stimulus compilation, good-board simulation and bad-board simulation. First, we use netlist language to describe the structure and function of a circuit, and find models of the circuit elements in LASAR's Librarian. The model compiler compiles the two parts and builds the circuit model. Then, we edit a stimulus file to describe the input stimulus of the circuit.
Keywords/Search Tags:design for testability, LASAR, fault simulation
PDF Full Text Request
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