Nowadays, our society has come into the age of digital information. It is very important to assure the precision and credibility of information. Error correcting codes are an important means to improve the credibility of information transmission. Among the linear block codes, RS code is an important one widely used in modern digital communications, which can correct both random and burst errors with the most powerful error-correcting capability. So it is widely used in data communication and data storage systems. At the same time, the application field of RS codes is wider with the more research of RS codes, the improvement of RS encode/decode algorithm and the development of correlative technology.First the thesis researches and analyses the RS encode/decode algorithm. Chapter two explains basic idea and maths deduction of the RS encode/decode algorithm in detail. Then, it constructs the circuits of all kinds of algorithms and establishes the basis of follow-up design.With the increase of IC design's complexity and size, IC design will take more and more time. SOC design is welcomed in order to decrease the time of design. The thesis designs an IC chip which is a SOC design based on 32 bit MCU — C*Core, it integrates RS encoder/decoder and USB2.0 controller. The chip has features of high speed data transmission and powerful error-correcting capability. Chapter three explains the method of SOC design based on C*Core and summarizes the design of SOC chip.Based on the research of theory and design method, chapter four designs RS (520,512) encoder/decoder which can encode a large data block and effectively decode. It especially fits to correct errors in data storage systems.Finally, the thesis designs a verification environment and many test cases to verify the function of the chip. The results of simulation indicate that the designed RS encoder/decoder can accurately locate the address of errors and correct errors during reading and writing all kinds of Flash chips in the case of limited errors number. |