Design Of A Fiber Optic Data Quantizer Chip

In modern fiber optic communication technology, the performance such as bandwidth, noise resistance and signal recognition of the fiber optic receiver become more and more important. All those determine the performance of the fiber optic receiving system directly. The goal of this paper is to design a Fiber Optic Data Quantizer which is used for signal recovery applications in fiber optic receiver systems with 2 μm Bipolar technology. It is required that this chip has wideband, low noise and can detect small signal. First, the paper introduces the fundamental structure and function of fiberoptic receiving system and fiber optic data quantizer. Then, the design of each module in this chip and the whole system are analyzed. In Detect circuit design, a duel-differential structure is introduced. It has high speed and can detect a small input signal (the typical value is 5mVP-P). In reference circuit design, a two-transistor bandgap reference with negative feedback and start-up circuit is introduced. This reference has high voltage and low temperature coefficient. A fully differential operational amplifier is introduced in the design of wideband limiting amplifier which can restrain the common noise effectively. In ECL/TTL comparator circuit design, the satisfied voltage range is gained by setting the number of diodes and resistors. Finally, the layout design rules and the issues to be regarded during layout design are mentioned. From the results of circuit simulation with Cadence, the functions of this chip meet the design goals with bandwidth of 65MHz. Basing on the completion of circuits simulation, the layout design is completed. Now, the layout has been fabricated.