Study Of Microstructure And Thermal Islation Property Of Porous Silicon Used In MEMS

Since1990, the photoluminescence of porous silicon (PS) was always the focus of attention. But with the development of Micro-Electro-Mechanical System (MEMS) technology, porous silicon has become a new kind of sacrificial and thermal insulating material used in MEMS due to its excellent mechanical and thermal isolation properties. The basic characters of PS and the application of PS as thermal isolation layer in MEMS are studied in this paper. Double-cell electrochemical etching was used to prepare PS. Through analysis the morphological characters of PS by AFM, it is found that the PS is uniform and the hole diameter is in the range of 15~50nm. The thickness and porosity of PS, which are affected by the etching time and etching current density, are discussed briefly. The result shows that the etching speed of PS is constant at the early stage, but at the later stage, the speed becomes slow with the increased depth of the hole. It is also found that the porosity values of PS samples prepared by different current density have the same trend that the porosity increasse firstly and then decreases with the etching time. In order to meet the requisition of preparing PS on large size silicon chip, pilot study is performed on preparing PS by galvanic element method. It is found that the uniformity of PS can be improved and the pole scale can be decreased by increasing the thickness of Pt film electrode. To study the crack phenomenon of PS, micro-Raman spectroscopy (MRS) is used to measure the residual stress of PS. The result shows that the tensile stresses increase with porosity of PS. The thermal conductivity (TC) of PS is also measured successfully by MRS. It is found that the TC of PS decrease rapidly with increasing porosity and thickness, and the lowest TC value of PS we prepared is 0.624W/mK. To contrast the thermal isolation efficiency between PS and silicon, VxOy thermal sensitive resistances are deposited respectively on the PS layer and the silicon substrate. It is found that the sensitivity of resistance deposited on PS layer is better than the resistance deposited on silicon substrate. And the resistance's sensitive is improved with the increasing porosity and thickness of PS.