The FPGA Solution Of Radar Signal De-noising Based On Wavelet Transform

Radar is widely used in civilian and military nowadays .However,the environment that the radar system being used is very complex. The research of radar de-noising is so important as the radar echo contains so much clutter, interference and noise within the system. The theory of wavelet analysis ,as a new subject,has been rapidly developed in the field of signal processing.As one major branch of wavelet application,de-noising theory is also being more and more pupular.'Modulus maxima de-noising'and threshold de-noising are two wavelet de-nosing approaches in engineering applications.Considering the characteristics of radar noise , this paper focuses on threshold de-noising and its improvements. As the software can not satisfy real time requirement in engineering application,hardware approach is necessary.With the population of FPGA,this paper gives an approch of wavelet Threshold de-noising based on FPGA.The main contributions are listed as follows:Firstly, it introduces the basics of wavelet theory, multiresolution analysis and wavelet de-noising,then it discusses the discrete wavelet and process of fast algorithm.Secondly, according to the characteristics of the radar signal and noise, the wavelet theory is applied to radar signal denoising.Simulation of wavelet de-noising was given using the tool of MATLB, different processing methods of the threshold were compared, to select the most suitable approach.Thirdly, using the design methodology of top-down. For one of the key modules - wavelet transform module, it used the DSP Builder design tool to design, which greatly facilitates the design work. Finally, analysis of performance was given.