The Decoding Research Of HSDPA Downlink Based On WCDMA

WCDMA is an important standard of the 3rd Generation in the world, and WCDMA system, which is based on the protocol of Release 99, can provide the transmission rate of 2Mbit/s. The level of rate can support most of phone operations. And some operations of the larger data flow and a shorter delay require the support of HSDPA technology.For the technique of Hybrid Automatic Repeat Request, fast scheduling and adaptive coding are introduced into HSDPA, the system becomes more stable. Decoding process of downlink, which is very important for HSDPA, includes physical channel demapping, the soft-bit generation, Constellation de-rearrangement, the first deinterleave and second deinterleave, the second-class rate match, the first-class rate match, Turbo decoding, block connections, bit-descramble and CRC check. The hardware design of downlink greatly improves the transmission rate for reaching 7.2Mbit/s, and finishs the base work for future network construction.First, the thesis analyzes the algorithm of downlink decoding, which is based on the design hardware and the platform of verification. And turbo decoding is a key part of decoding process. Then the detailed analysis of two important decoding algorithms, named MAX-LOG-MAP and the MAX-LOG-MAP, has been shown in this thesis. MAX-LOG-MAP algorithm based on the decoder is beneficial to greatly cut operations of multiplication, and reduce the complexity of hardware design. Combined with the strategy of sliding window and reusable modules to reduce the decoding delay, the decoder meets the system requirements.Secondly, detailed design of downlink hardware, including division of hardware and software function, system architecture, is shown to analyze the time used for the sub-function module to deal with the data. Then the process about dealing with data is described in everal important control modules. Finally, the thesis describes the popular verification platform in IC design, named Specman. Combined with the project's requirements, the structure and design of the platform is verified. According to the characteristics of downlink, detailed the case of verification are designed to cover all functions for finding out design problems. The problems are analyzed to find out causation, and module must be modified until entirely correct.