Research Of Satellite Channel Equalization Algorithm And FPGA Implementation

In the high-speed digital communication systems, equalization technology is used commonly to improve unideal channel transmission characteristics. Among equalization technologies, the blind equalization technique is equalization technology development's focus which only uses statistical knowledge of the signal to improve the bandwidth efficiency. Blind equalizer can be implemented by the DSP or FPGA. The FPGA's internal resources is rich, and has parallel computing architectures, has a very high processing speed. Therefore, this paper make a deeply research in using FPGA proceed high-speed satellite communication system's blind equalizer of design and implementation. The done work as the following points.Firstly, this paper introduced three reports of improved blind equalization algorithm in recent years, including the modified constant modulus algorithm, switching method dual-mode algorithm and the weighted dual-mode. Then summarize the principle of the algorithm and compare the advantages and disadvantages of their performance, and simulate their function and performance by MATLAB.Secondly, for FPGA implementation of the equalizer, design of the weighted dual-mode algorithm is given. Design module includes: equalizer input module, the effective intercept module, the filter output module, the minimum search module, the error calculation module and the weight updating module.Thirdly, according to the equalizer requirements of function and performance, selecting the XILINX company's Xc2s300e of Spartan2E devices to load hardware circuit of equalizer. Based on weighted dual-mode blind equalizer's design, this paper adopts a top-down design method, and then makes use of VHDL to describe the details of each equalizer module and simulate by using Modelsim functional software. Lastly analyzes hardware design results after verifying functions.Finally, after verify the correctness of the blind equalizer according to the hardware timing and circuit analysis, the designed equalizer will be downloaded to FMC6416PAS experimental development board to have a test, thus can achieve a weighted dual-mode blind equalization algorithm.