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The Realization Of PCNN Image Compression Coding Algorithm Based On OMAP3530 Platform

Posted on:2012-12-01Degree:MasterType:Thesis
Country:ChinaCandidate:K ShiFull Text:PDF
GTID:2178330335969958Subject:Circuits and Systems
Abstract/Summary:PDF Full Text Request
Texas Instruments (TI) OMAP3530 is the latest GPP+DSP dual-core chips. As multimedia information processing platform in the embedded system, there are a wide range of its applications and technical potential with the development of the multimedia technology and Internet technology.Because of the requirement of processing and transmissing the HD image and video fast and not distorted, the image processing algorithm specially image compression coding algorithm need to be improved. The development of artificial intelligence information processing theory, which is based on biological information processing model and the human visual system, promote the intelligence of image compression coding technology. As one of the landmarks of the third generation of artificial neural network, Pulse Coupled Neural Network (PCNN) has been proved to be well potential in the digital image analysis and processing.This paper focued on the hardware realization of PCNN image compression algorithm with GPP+DSP dual-core chips_ OMAP3530. Its main content is summaried as bellow:1. Elaborated the basic principles of PCNN and the PCNN Irregular Segmented Regions Coding algorithm (PCNNISRC).2. Elaborated the OMAP3530'basic hardware structure and embedded Linux systems. The every parts of Embedded Linux systems have been transplanted to the target board DevKit8000 successfully. Combined with the characteristics of the different starting method, the problems in the process have been summarized and analyzed.3. Explored the OMAP3530' software structure based on the DVSDK. Analysised principles and role of several important modules such as DSP/BIOS LINK,LPM,CMEM. These modules have been transplanted to the target board DevKit8000 successfully.we have made the development work on Codec Engine, which is the core of DVSDK.4. Achieved the image processing platform on OMAP3530. The hardware frame work, modules design and software structure were explained in detail. Finally the algorithm of PCNNISRC was achieved on the platform. The platform achieved real-time image acquisition, processing, storage and display.
Keywords/Search Tags:OMAP3530, Pulse Coupled Neural Network, segmented coding, Linux system, DVSD]K, DSP/BIOS LINK, Codec Engine
PDF Full Text Request
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