Research On Network Interface In High-Speed & Heterogeneous Access Switcher Based On FPGA

With the continuous development of people's cultural life and material life standards, the demand for information interaction with high speed is over-growing. The access network has become a bottleneck in the development of modem communication network, which is in the middle of the user's network with increasing demand of high data rate and the core network with high-speed, high-capacity switching capacity. As an important component of the high-speed heterogeneous access switch, the high-speed network interface subsystem is one of the key technologies to improve the network performance about data exchange. The main content of this paper is to develop the high-speed network interface subsystem of the high-speed heterogeneous access switch based on FPGA, which is responsible for physical data Transceiving and provides a unified and transparent interface for the upper layer, so as to constitute a more complete network interface including the physical layer and reconciliation layer.Firstly, this paper analyzed the characteristics of the high-speed heterogeneous access network, and proposed distributed access switch architecture. Then, based on the requirement analysis of the high-speed and heterogeneous access users, detail design and Verilog RTL code of the proposed high-speed network interface subsystem of access switch architecture are completed, which passed the Modelsim function simulation and timing simulation. At last, according to the programmable feature of FPGA, the network interface system was configured to support four different access types:laser link, microwave link, gigabit Ethernet and fiber Ethernet in orderling, and the data stream implementation bit file was generated and download to the FPGA, which imitated different access ways and their corresponding loopback process. The final demo test results demonstrate that the implementation of the high-speed network interface system can support four access modes:laser link, microwave link, gigabit Ethernet and fiber Ethernet, and provide a unified transparent 64-bit high-speed bus interface for upper data processing, realizing high-speed, point-to-point reliable data transmission.