Testbench And Parallel Programming Model For Network On-Chip

Network on Chip (NoC) technology is a strategic technology and a research focus in the field of integrated circuit design nowadays. The core idea of NoC is migrating computer network communication technology to chip design in order to replace the traditional bus communication architecture. NoC has extreme advantages in scalability, reusability, design efficiency, bandwidth, synchronization strategies, which have made it one of the most promising solutions to the communication problems on the chip.The research of multi-core chips is a general direction in upgrading the processor technology, so the research of parallel programming based on multi-core processors is needed urgently. This paper focused on testbench of multi-core processors and parallel programming models, and got some solutions on software development of testbench of NoC multi-core processors, parallel programming models and skills based on NoC.Firstly, we designed a streaming media presenting system to test the performances of the H3MP16 multi-core processor proposed by the project team, such as the port throughput, on-chip interconnect throughput, off-chip shared memory access capability and the parallel performance. We proposed a program to send and capture packets based on socket communication, and performed the online synchronous transfer and display of FFMPEG, tested the packet loss rate and playing effects. And finally we succeeded to provide an effective test platform for multi-core processor.Secondly, after extensive reading of a large number of relative articles, we summarized the main parallel programming models, parallel programming language and parallel compilers. And based on this, we accomplished parallel execution of FFT algorithm through OpenMP model and GPU computing platform, and finally achieved considerate speedup. And we also analyzed the relationship between speedup and the number of parallel threads and the complexity of FFT algorithm. On the other hand, we also gave some solutions on improving the speedup, including a hybrid parallel programming model based on MPI and OpenMP in order to take the advantage of the hierarchical structure of NoC, and we also analyzed the optimization measures of CUDA based on GPU computing platform.Currently, the software design of NoC still remains at an early stage, and our research focused on software development of NoC, dedicated to the exploration and solution of possible problems in NoC and accumulated certain experience of the design of NoC.