Research On Atomic Layer Deposition TiN Barrier Layer In Through Silicon Via Interconnection

As the reduction of critical dimension and the increae of density of integration in integrated circuit (IC), CMOS IC is seeing very significant bottlenecks, containing material, device, structure and so on. To improve the density of IC,3D IC based on through silicon via (TSV) interconnects is put forward. Cooper would be one of the most important conductor materials, but copper inside the TSVs would easily diffuse into the bulk silicon, drift into SiO2, and form weak chemical bonds with low-k materials, causing some failures in IC devices. To prevent the above problem, diffusion barrier layers between cooper and Si have been introduced. Research on barrier layers, containing deposition methods, failure mechanisim and depositon on vias or trenches, is important.All kinds of barrier layers and their deposition methods were investegated, and then the atomic layer depositon (ALD) method was used to grow the TiN thin film on SiO2/Si substrate. First the growth mechanisim was verified by the experiment of changing the growth cycles. Then the most proper temperature was choosed by changing the depositin temperature in the range of 350℃to 500℃.The best depositon condition was obtained by the above experiments, and various analysis methods were used in the experiments.Finally the smooth and dense TiN thin film with low resistivity and low impurity content was obtained. In order to evaluate the performance of TiN as diffusion barrier layer, copper is sputtered onto TiN film and then post-annealed in a vacuum ambient of 10-5 Pa at a temperature range of 400℃to 600℃for 1h. The experiment results show that there is no copper diffusion into the SiO2.below 600℃, but the copper was detected in the SiO2 after annealing at 600℃. And the failure mechanisim from the analysis results is that the copper diffuse along the grain boundary into Si, reacte with Si, and generate Cu-Si compound.To realize TSV interconnect, first Si with blind via was prepared by deep reactive ion etching, and the width of via is in the range of 10 to 15 micros, and the aspect ratio is in the range of 5 to 10. Then the SiO2 insulated layer was deposited by plasma enhanced chemical vapor depositon (PECVD) method, the TiN barrier layer was deposited by atomic layer depositon (ALD) method and the copper seed layer was deposited by sputtering. Finally, the Damascene copper electroplating method was used to deposite the copper conductor. The results show that superconformal conductor layer was obtained. It is realized by the uniform deposition of TiN in the high aspect ratio vias. Above all, the through silicon (TSV) interconnect is realized in high aspect ratio vias.