Flow Control And Bandwidth Allocation Research In Network Processor

Due to the network and communication, the processors of Intel and AMD have improved their frequency much. In the recent years, the transmit frequency has been doubled every year, so Intel and AMD won't worry about the use of their processors. Due to the fiber, the media carrier is not the bottleneck of network. However, when one packet arrives at the switch or router, the basic responsibility is to determine its destination. There will be much time to search its IP address from the large route table, determine whether to forward or discard it before the next packet arrives. Here is the bottleneck.In order to handle more and more packet flows, the frequency of network was 155Mb/s (SONET OC-3) some year ago, but now it's 10Gb/s (OC-192), and it will continue rising up to 40Gb/s (OC-768). When the frequency is not high, the common CPU is capable to handle the flows, so the specific network processor is luxury. But now, the common CPU is not capable enough and ASIC is adopted directly. As we all know, ASIC do a good job in almost all the places, but it has two disadvantages, long design period and not programmable. It's the reason why many design corporations have focused on the network processor. The broad marketing is alluring always. Flow control and bandwidth allocation is the critical issue of designing network processor. Beginning with the congestion problem in the network layer, this paper analyzes the different flow control and bandwidth theories and the specific ways in NP4GX. Based on the new BAT algorithm, the author defines the system architecture and micro module architecture, implements the RTL with VHDL language and finishes the function simulation and synthesis. BAT is the new coprocessor in NP4GX and the chip will be taped out in March 2005.