Research On Placement Method Of Analog Integrated Circuits

As VLSI manufacturing technology evolves into the Deep Sub-Micron era, Mixed-Signal systems and System-on-Chip (SOC) are becoming dominating trends in VLSI design, and layout design of analog integrated circuits is gaining more and more importance. Placement is one of the most important steps in VLSI layout design. This dissertation focuses mainly on placement method and algorithms of analog integrated circuits.The dissertation proposes a signal-flow driven placement method of analog integrated circuits. In this method, each analog circuit is partitioned into two parts: the signal-flow part and the biasing part. Accordingly, placement of the whole circuit is divided into two steps: the placement of the signal-flow part is first constructed by a deterministic algorithm, then the placement of the biasing part is optimized by the corner block list based analog placement algorithm combined with the simulated annealing algorithm.To improve the original analog placement algorithm used in the placement of the biasing part, the dissertation proposes a fast analog placement algorithm FAST_CBL. By reusing the largest common sub-floorplans during simulated annealing process, FAST_CBL significantly reduces the overall computations during the annealing process, therefore improves the original analog placement algorithm. The dissertation also proposes a corner block list based algorithm SYMM_CBL to handle symmetry constraints in the placement of the biasing part.In addition, a new rectilinear module placement algorithm RECTI_CBL is also proposed to handle modules of complex shapes in the placement of signal-flow part. By combining an obstacle-based method and a replace-based overlap-avoiding method, the placement algorithm efficiently handles arbitrary rectilinear modules.