Implementation Of Star Image Acquisition And Preprocessing Algorithm By FPGA

With the high speed development of Information and Computer Technology,Digital Image Processing technology has been a very key science more and more. Because of it is hard to implement real time image processing operations through software techniques, image processing field is one of the most active areas for reconfigurable computing. The inherent reprogrammability of Field Programmable Gate Arrays(FPGA)gives them some of the flexibility of software while keeping the performance advantages of Application Specific Integrated Circuit(ASIC). The purpose of this paper is studying the hardware implementation of CCD(Charge Coupled Device) digital image acquisition and preprocessing. The result of experiment has indicated that the way is valuable to detect the star targets effectively in real-time. Based on the study and design of real-time image processing system,contents in this paper are as follows:(1)The article introduces an instruction and basic working principle of the image sampling board in detail. In accordance with the high resolution CCD camera,it tells us how to make the pixels of CCD one-to-one correspondence with the design methods of the hardware and the software.(2)The characteristics of small targets,noise and background in star image are analysized in this paper,the image model of background and the preprocessing for point targets detection in complex background are presented. Through the star image analysis, an preprocessing algorithm for star image is proposed. A space Gaussian lowpass filtering method is presented to restrain the noise and enhance the star targets. Then a space high filtering method is used to eliminate background signal. The experiment demonstrates that this method achieved good application effects.(3)Digital signal processing system can't implement complex detecting algorithm in real-time because of the limitations in the complexity and operation speed of system. In this paper,we can implement the preprocessing algorithm for detecting the weak and small targets by FPGA,and make computing,data tansformation and coincide。Array and area optimizing adders are used as well as pipeline pattern,these methods accelerate the operating and reasonably resolve the mutually restriction of resources and speed. With the field practice of the image processor,this scheme has achieved a satisfactory result.