Research And Implementation Of Timing Recovery In The Downlink Of WCDMA And B3G Systems

The research and development of the third generation(3G) mobile communication systems is carrying on world-wide. WCDMA is one of the main standards of 3G. However, with the increasing demand on traffic data rates, communication systems beyond 3G is attracting more and more attention. National Mobile Communications Research Laboratory of Southeast University proposed General Multicarrier Time Division Duplex Hybrid Division Multiple Acesss(GMC-TDD-xDMA) radio transmission technology in this background.Timing recovery is a key function in any digital communication systems. This thesis investigates the timing recovery problems in WCDMA and GMC-TDD-xDMA system.Firstly, traditional scheme of timing recovery in direct sequence spread spectrum communication systems is introduced. And the analysis in WCDMA environment is given. The influence of residual timing error to overall system performance is examined by computer simulations. Simulation results demonstrate that 1/8 chip timing error is acceptable since the performance loss in this situation is negligible. Therefore, the timing recovery scheme based on 4 times chip-rate oversampling can be adopted while considering the trade-off between implementation complexity and system performance.Secondly, this paper briefly introduces the techniques in physical layer of GMC-TDD-xDMA system. A synchronization scheme for this system in mobile environment is presented. 2D energy window technique is used to combine multipath energy from multiple antennas and interpolation to improve timing precision. Simulation result indicates this scheme has a good detection performance.Finally, based upon the timing recovery scheme, FPGA verification system is accomplished with Verilog HDL. Utilizing polyphase decomposition, the implementation structures of matched filter and interpolation filter are optimized. And the circuit scale is largely reduced.