The Polynomial Model Of Circuit And Its Application In Component Matching

With the development of VLSI, many people consider of using the existing circuits to accelerate the design speed of the system, which is called design reuse. With the increasement of the reusable blocks, searching and allocating these blocks also becomes more and more complex. How to select appropriate components to implement the design of the SOC is a difficult problem to solve.In this paper, a modified polynomial method is presented, which can solve this difficult problem to a certain degree. It can translate the bit level description of the specification of combinational circuits and sequential circuits into word level polynomials. This method also can help to simplify the polynomial model. In theory, it can also resolve sequential circuit by determining the equivalent combinational circuit. But the process is extraordinary complex. It is simply discussed in the third part of this paper.When the polynomial model of the design circuit is determined, the components matching and verification can be resolved using the theory of Grobner Basis. First, the ideal generated by the library components can be computed; and then the Grobner Basis of the ideal can be determined accordingly. For the reason that the executing time of the existing serial algorithm is too long, a parallel algorithm under the shared memory MIMD model is proposed in this paper. The serial algorithm is parallelized in two main sides. One side is the group-based coarse granular parallel algorithm, the other is the thin granulation parallel reduce algorithm. Then the complexity of the two algorithms is analyzed and compared. In the following, the aspects of the parallel algorithm need to be modified are pointed out. The last part of this paper is the conclusion.