Turbo Codes And Its Application In DTV

Turbo Codes and Turbo Decoding (Iterative Decoding) represent the most advanced channel coding and decoding techniques in the world presently. For its error correction performance extremely close to the Shannon limit,from the beginning,Turbo Codes attracts the eyes of enormous professionals and researchers. In turn,it is called the greatest contribution after Ungerboeck's Trellis Coded Modulation (TCM).Channel coding is an important component in Digital TV and determines DTV system's error correction performance and Signal-to-Noise Rate (SNR) threshold to a great extent. So it plays an indispensable role in settling the overall performance of a DTV system. Conventionally,DTV systems adopt coding schemes such as RS or convolutional codes,or concatenated codes,where the error correction performance is still quite far away from the Shannon limit.Primarily this paper investigates the principles,algorithms and software and hardware implementations in the application of Turbo Codes in DTV systems. In particular,computer simulations and analysis are taken for the optimization of Turbo codes' parameters and Turbo decoder's FPGA implementation architecture. After a great amount of detailed computer simulations and concise qualitative and quantitative theoretical analysis,the Turbo Codes' parameters and FPGA specific hardware implementation architecture suitable for being integrated into DTV systems are determined. Furthermore,the CODEC is completely designed with Verilog HDL,ending with an occupation of less than a 600-thousand-gate FPGA chip. At this lowest hardware cost,a white noise SNR threshold of 1.8dB at a net stream rate of 6Mbps is achieved,which exceeds all other existent DTV systems' performance.Chapter one introduces the development and fundamental frameworks of both Turbo Codes and DTV systems. Chapter two describes the fundamental theory of Turbo Codes and its iterative decoding algorithm in detail. Chapter three shows the software flow process of Turbo decoding (mainly constituent code decoding) algorithms. Chapter four is the focus of this paper. Based on amount of computer simulations and concise theoretical analysis,detailed parameters appropriate for DTV systems are brought forwards. And then the optimal implementation details for each module are given,followed by a complexity analysis and performance analysis for the final system. A description for further optimization aspects terminates this chapter. Chapter five contains the hardware test result,conclusion and some research aspects in the future.