The Research And Implementation Of Channel Decoding In FLEX High Speed Wirless Paging System

With the development of mobile communication, studying the key technology and developing the products with independent intellectual property have become a new subject in national information industry. Channel coding is one of the key technology of mobile communication. This paper describes the error control coding of the FLEX paging system, with emphasis on the design and implement of the FLEX decoder circuit by means of the FPGA technology.The FLEX decoder designed in this paper includes the physical layer block, the date link layer block, the BCH decoder and the SPI interface circuit. The configuration of MCU is adopted in the design of the BCH decoder, which make the BCH decoder has simple structure and high decoding speed. All of the circuits are described by VHDL and simulated on the flat of Foundation 3.1i. which belongs to the XILINX Company.