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Design And Realization Of A MP3 Decode System Based On Fixed DSP Chip

Posted on:2003-05-24Degree:MasterType:Thesis
Country:ChinaCandidate:D JiFull Text:PDF
GTID:2168360062486307Subject:Circuits and Systems
Abstract/Summary:PDF Full Text Request
MPEG (Moving Picture Experts Group) is a working group of the ISO/IEC Organization, The coding and decoding Technology Standand of the moving picture and audio is established by them. MPEG-1 LAYERS describes the 3th Layers digital audio algorithms of the MPEG organization, and it has high compression and excellent audio quality. The music that compressed in this audio format has been very polular on the Internet. So a new consumer electronic product梡ortable mp3 player has huge market value now.The goal of the thesis was to establish a hardware system which use a popular digital signal processor to decode the mp3 music, it can download the mp3 bitstream form the PC and store the data in the flash memory. And the DSP chip can update its software easily, so we can decode different format music using the hardware system.The codec technology of the MPEG series ISO/IEC standards are outlined in the thesis, and the feature of MPEG-1 LayerS standard decode algorithm is studied. The principle and structure of the decoding system are described and analyzed, the system uses a digital signal processor TMS320VC5409 as a key device with a complex programmable logic device EPM7128, and use a USB chip according with USB1. 1 protocol to communicate with the PC, it can decode the mp3 bitstreams realtime and output the digital audio by a speaker. The hardware debugger isintroduced in the thesis, and some important details are emphasized. The DSP/BIOS real time design module of the CCS is used for the software design. The real time software design for the MP3 system, inclding DSP control software and DSP data processing software, is discussed in the paper. In order to reduce the computing complexity and the needed data storage , some fast algorithm of the decoding flow are studied, the IDCT module in the Synthesizer Subband Filters is discussed detailed. A algorithm of IDCT implement on the fixed-point DSP chip is given.
Keywords/Search Tags:Digial Audio, MPEG Audio, DSP, CPLD, USB, Fast algorithm, IDCT
PDF Full Text Request
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