The Virtual Logic Analyzer Based On Ethernet

Digital electronic products has become a trend with the development of embedded systems, and many problems happened to experiment ,development and testing can be solved by the virtual logic analyzer. The logical analyzer is the sequence number, which can be used to monitor the work of instrument hardware, and finally expressed with graphics intuitively, facilitate user testing and analysis of errors in the circuit design. at present the most logical analyzer is desktop machine on the market, which only can be used in local area. In this paper introduce a virtual logic analyzer that based on Ethernet technology can both local use, also solved the problem networked remote test and measurement of.CYCLONE II series of FPGA and Nios II embedded processors are used in this paper, and network driver chip ENC28J6D to implement the logic analyzer. Nios II is a kind of soft CPU based on FPGA development. It can be configured characteristics brings great flexibility in embedded system developing. Nios II can be cut to satisfy different customers according to the different application.Paper content as follows: Chapter 1 introduce the development history of the logic analyzer, classification, principle and the index of analyzer in this paper. Chapter 2 describe the solution of the system and the select of the CPU. Hardware circuit design is elaborated in chapter 3, include circuit principle, design of PCB routing and circuit board welding, debugging. Chapter 4 mainly involve the software design in FPGA, Sampling, trigger and storage are in Verilog hardware description language logic design; serial and network communication are in Nios II soft core to realize. Panel, menu design, and the communication protocol of the logic analyzer are introduced in chapter 5 based on JAVA language. Chapter 6 is the testing of the logic analyzer. And finally chapter summarizes the features and needs to be further improved.