Research Of Logic Analyzer Based Virtual Instrument Technology

The Logic Analyzer (LA) is one of the most representative test tools in Data Domain Measure. Virtual Instrument (VI) technology is developed upon both instrument technique and computer technique. And it is considered as the future trend of instrument technology. This thesis focuses on the research and the development of the Logic Analyzer which is based on the Virtual Instrument technology.Chapter 1 and Chapter 2 introduce the Logic Analyzer and the Virtual Instrument technology, and put forward the scheme of "PC+MCU+CPLD+USB" according to the analysis and demonstration of the system project.Chapter 3 mainly discusses the hardware design of the Logic Analyzer. Firstly, the work principle of the Logic Analyzer is taken apart deeply. Then according to the requirement analysis, each module of the hardware system is made certain. At last the system resources are allotted and the firmware program is designed as well.Chapter 4 designs the logic control modules which are the core problems of the Logic Analyzer based on CPLD technology. The modules mainly include the identifying and bringing trigger within CPLD1 and SRAM logic control circuit within CPLD2. The bringing trigger module actualizes several kinds of trigger modes, such as the basic trigger, the sequence trigger and the delay trigger.Chapter 5 discusses the software design of the Logic Analyzer. The work environment of LabVIEW is utilized to program the soft front-panel and the drive of the USB correspondence interface. At the end of the chapter, communication protocol is also established.In the last Chapter, a summary is presented and some suggestions are put forward to improve the instrument.