| The neutrons are non-electrical particles, not influenced by electric field form atomic, so they are gets into material easily and interact with nucleus directly. The diffraction of thermal neutrons which with low energy is become a very important tool for scientific research and new materials'development.. As a series of new generation neutron sources around the world have been built to provide high- flux thermal neutron beams, large-area position-sensitive thermal neutron detectors have become an important research subject. There are higher requirements for the readout system of detectors.This paper introduced a Pads array readout electronics-system based on THGEM position-sensitive thermal neutron detector. The detector is based on the nuclear reaction of thermal neutron and 10B, it produced emitting alpha rays and particles 7 Li from the target 10B, then, those emitting particles made the working gas which consists of 80% Ar and 20% CO2 at one atmosphere produce electrons by ionization. The electrons by ionization were avalanche amplified by THGEM and then were collected by a two-dimensional readout system based of Pads array. The incoming neutrons'position information was given by using of the charge center of gravity readout method.Based on the Pads array of two-dimensional readout system, 64 channels of information in all dimensions need to be amplified. In order to simplify the readout system, during the pre-amplifier designing, an ASIC chip (VA64TA2) of 64 channels of charge sensitive preamplifier-shaper circuits was used in every dimension to amplify all the signals from the collecting board, but also the chip VA64TA2 have the function of discrimination, selection and trigger. FPGA the controller of VA64TA2 was applied to config and control the readout of VA64TA2. The amplified signal by VA64TA2 was output in the form of differential current. The current was amplified by high speed differential amplifier and main amplifier, then, it was transmitted to the data acquisition system. The dynamic range and electronic noise performance test of VA64TA2 were given, the result was, the dynamic range is 16fC in which the degree of linearity fitting was as highly as 0.99974, and the electronic noise of the preamplifier board was 12×10-3fC, that is 75 electrons noise in the test of multi-channel pulse amplitude analyzing.The data acquisition board, that is the main board, it mainly transformed the amplified analog signal from the preamplifier board to digital signal and transmitted the digital signal to computer for processing. The analog to digital converter chip is AD9220 from ADI Corporation, which is a 12-bit high speed analog to digital converter, the highest sampling frequency is 10MSPS. In the aspect of computer communication, USB 2.0 interface was used. The main controller chip of USB was a high speed controller chip CY7C68013-A of EZ-USB FX-LP series from Cypress Corporation. It is widely used in data acquisition area, and can be used in high speed data transmission of USB 2.0. FPGA as the whole controller of data acquisition system is CycloneⅡEP2C8Q208C8N, a chip of Cyclone II series from Altera Corporation. It connected two channels of ADC(AD9220) and USB(CY7C68013-A) and served as a buffer to the ADC data simultaneously.This paper introduced the circuit designing of each chip on the data acquisition board. It introduced the internal structure of CY7C68013-A, which is the USB controller. The chip CY7C68013-A worked at GPIF (General Programmable Interface) mode and this mode is particularly fit for high speed data transmission condition. The firmware of this mode was given. It is an inner logic controlling mode, that is, a highly efficient logic control is applied in the inner part instead of the external micro-controller to manipulate the endpoint FIFO of CY7C68013-A. |
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