| The rapid development of high-performance computing,artificial intelligence,and big data applications has brought greater challenges to multi-core on-chip computing systems,which also put higher performance demands on the multi-core network-on-chip in terms of parallelism,latency,and energy consumption.Due to the energy consumption,and signal crosstalk of metal wires,traditional electrical interconnects have become a bottleneck for further development of network-on-chip.Meanwhile,as the technology of silicon-based optical devices keeps improving,optical interconnect technology has become a popular research topic in academia and industry as a viable alternative for the future with its advantages of distance-independent low latency,high bandwidth density and energy efficiency.However,the path reservations of Optical Network-on-Chip(ONo C),which is based on Optical Circuit Switching(OCS),will cause contention and latency,energy consumption,and other overheads caused by waiting for link resources when the traffic load of the network gradually increases,and continue to spread the blocking probability in the network.It also continues to expand the congestion area in the network and introduces high congestion probability,which reduces the packet path reservation efficiency,link utilization,and overall network latency and bandwidth performance of the network.The study of how to solve the link resource competition in optical network-on-chip and improve the link utilization and link establishment efficiency of optical network-on-chip in terms of network topology and resource allocation strategy is the key to improve the communication performance in multicore computing systems.On the other hand,with Moore’s Law approaching and the increasing development and manufacturing costs of monolithic silicon integration technologies,it is becoming increasingly difficult to achieve performance improvements in traditional monolithic integration-based multicore computing systems on-chip.Chiplet technology offers significant advantages over monolithic integration in terms of chip yield,design time and cost,and heterogeneous integration by using advanced packaging methods to heterogeneously integrate chiplets of different processes or functions.In addition to providing nearly distance-independent energy consumption,latency,and high bandwidth density,the integration of optical interconnects enabled by silicon-photonics technology and Chiplet integration technology based on silicon interposer can further reduce integration and packaging costs,and utilize Wavelength Division Multiplexing(WDM)to achieve a high I/O(Input/Output)bandwidth,and the use of optical links deployed in the silicon interposer layer for long-distance inter-chiplet connections.It is important to study how to efficiently coordinate the optical interconnect technology and Chiplet integration technology to achieve a highly parallel and scalable Chiplet-based multicore optical interconnection architecture using the WDM of optical interconnects to further improve the performance of multicore computing systems.This thesis aims to design optical interconnection network architecture for multicore computing systems,and focuses on the issues of link resource competition,high congestion probability,low link establishment efficiency,high complexity of routing algorithm,low scalability of algorithm,and low energy efficiency in optical network-on-chip,etc.Combining the advantages of optical interconnect technology such as high bandwidth and low energy consumption,this thesis investigates the monolithic integration-based topology automation method,routing algorithm and chiplet based optical interconnection architecture design.Theoretical analysis and network-level simulation are used to evaluate the performance of the proposed solutions and achieve the design goals of low-congestion,lowenergy,low-complexity,high-bandwidth,and high-parallelism optical interconnection architecture on-chip.The main achievements and innovations of this thesis are concluded as follows:1.A comprehensive survey of key technologies and related research advances in optical interconnection networks for multicore computing systems is presented.Existing optical interconnection design solutions are organized and summarized from two aspects,monolithic integration and Chiplet integration,respectively.The emphasis is on the optical interconnection network topology and routing algorithm based on monolithic integration and the optical interconnection network architecture based on Chiplet integration.The existing issues,challenges,and improvement directions of optical interconnect networks for multicore computing systems are summarized.2.To solve the current challenges of monolithically Integrated Optical Network-on-Chip,such as link resource contention,high congestion probability,low parallelism,low scalability,and high-power consumption,we design a monolithically Integrated Optical Network-on-Chip topology automation method by fine-grained modeling of network nodes,links,and congestion probability,and combining with heuristic solution algorithms.By building a theoretical model of the network and calculating the network congestion factor,the method can build a low-congestion topology without additional wavelength or scheduling overhead.By performing network-level modeling simulations,it is verified that the optical interconnect architecture based on this method achieves better performance in terms of latency and throughput with a lower number of optical components.3.To solve the issues of low parallelism of routing paths between nodes,low link establishment efficiency and low feasibility of monolithically integrated networks-onchip,Loophole is proposed in order to model and analyze the utilization of resources such as latency,paths and ports of each part of the interconnection network,taking into account the interconnection architecture and the traffic loading characteristics of different paths,and to design a congestion-aware routing algorithm for monolithically integrated networks-on-chip.Loophole analyzes latency and predicts port conditions caused by network congestion through a low-complexity and efficient prediction and learning method and develops an optimal routing decision for packets.The accuracy of the port congestion prediction model is also proved by performing network simulations and analysis of congestion on different ports.The simulation results show that Loophole can achieve high adaptability in routing selection with low algorithm complexity and extra overhead,improving data transmission parallelism and enhancing the performance of optical network-on-chip in terms of throughput and latency under various traffic patterns.4.To solve the issues of frequent optical and electrical conversion,high energy consumption and low parallelism of communication in non-flat interconnection structure of Chiplet-based optical interconnection network,Saturn is designed to be a low diameter optical interconnection network architecture based on Chiplet integration by considering new integration technology,optical device layout method and optical wavelength division multiplexing technology.The architecture is designed according to the requirements and characteristics of inter-core communication and memory access communication.By using broadband micro-rings,laying out the micro-rings of the optical interconnection architecture,and designing an efficient wavelength assignment strategy,Saturn achieves a waveguide crossing-free,low-loss,and non-blocking optical interconnection network.Simulation results show that Saturn achieves higher performance than existing architectures under various synthetic traffic and real applications. |
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