Research On Organic Field Effect Transistor Photoelectric Memories Based On Hybrid Floating Gate/Tunneling Layers

Organic field effect transistor（OFET）memory has been widely studied because of its low cost,large area,nondestructive read-out,good compatibility with integrated circuits,and flexible applications.In this thesis,the hybrid floating gate/tunneling layer design is adopted.According to the different functions of light in the memory,OFET photoelectric memories were prepared and studied.The main research contents are as follows:1.Using perovskite quantum dots（QDs）/organic polymer composite film as charge trapping layer,optical/photoelectric programming OFET memory was studied.The memory has the characteristics of multi-level data storage,good data retention and durability.In addition,low-voltage OFET photonic memory was studied by spin coating organic polymer films as blocking dielectric layers.The working voltage of the device is effectively reduced to 5 V.Compared with the traditional SiO₂ blocking dielectric layer device,it still has the characteristics of multi-level storage,stable retention and durability.2.By introducing solution treated[6,6]-phenyl-C₆₁-butyric acid methyl ester/Poly（methylmethacrylate）（PCBM/PMMA）composites as photosensitive charge capture layers,photoerasable OFET memories were prepared and studied.The effects of different PCBM/PMMA mixing ratios,a series of programming voltages and photoerasing conditions on the performance of the devices were systematically studied.10%PCBM/PMMA hybrid device shows the best data retention performance（>1.2×10⁴ s）,as well as 2-bit data storage,more than 800 stable durable cycle performance.3.The dual-functional optoelectronic memories were prepared by using ternary hybrid PCBM/CsPbBr₃ QDs/Polystyrene（PS）film as floating gate/tunneling layers.The memories can realize the dual-functional storage operations of electric programming holes-light erasing and light programming electrons-electric erasing.In addition,the memory devices have a fast light erasing speed of 0.05 s,low erasing voltage of-35 V,500 continuous and stable durable cycles,and electron and hole retention characteristics greater than 10⁴ s.4.The photoerasable memory with a large memory window was obtained by sandwiching PCBM/PS composite film between two layers of pentacene.The larger memory window may be due to the larger interface contact area between pentacene and charge trapping layer and the assistance of internal electric field that may exist in the programming process.Compared with the memory without sandwich structure,the memory window of the new memory device can be increased by 347%,and the memory window can reach 38.9 V under programming voltage of-70 V.The device only captures hole charge,which has great advantages in single charge trpping memory.Moreover,the memory shows good endurance and retention characteristics in 600 cycle tests and 10⁴ s data retention tests.