Research Of Charge Trapping Organic Field Effect Transistor Memory

The development of digital and network technology makes people's demand for information storage to be continuously growing.People's demand for the next generation of electronic products is not only high reliability,but also other application advantages which include good wearability,better portability,light weight,environment friendly,et al.With the advantages of single transistor implementation,non-destructive reading,large-area fabrication,feasible to be integrated with organic circuits,organic field-effect transistor memory has become the mainstream of research.In this kind of memory,charge trapping material is the functional layer of charge storage,so its composition,quality and performance will have important influences on the storage performance of the device.In order to solve the problems of complex preparation process and poor controllability of charge trapping materials in the current organic field-effect transistor memory,this paper explores the preparation of materials with good charge trapping performance,simple and controllable process.The organic field-effect transistor memory taking polysilicon(Poly-Si)single floating gate,(Poly-Si)+carbon quantum dots(CQDs)double-floating gate,CQDs/PVP(polyvinyl pyrrolidone)composite nanostructures as charge trapping layer is respectively designed and prepared.By improving the structure of charge trapping layer and changing the composition of material step by step,the memory window and retention time of the device can be increased,and the operating voltage can be reduced.The memory characteristics and mechanism of devices with different charge trapping layer structures are systematically studied,and the main research contents and results are as follows.1.An organic field-effect transistor floating-gate memory with polysilicon as charge trapping layer is designed and fabricated,whose structure is n⁺-Si/Si O₂/Poly-Si/PMMA/pentacene/Au.As the floating-gate layer of continuous media,the polysilicon is prepared by traditional technology of Low Pressure Chemical Vapor Deposition(LPCVD).Using the floating-gate structure of continuous media not only avoids some problems in the preparation process of nanoparticle floating-gate,but also increases the tunneling area between the active layer and the floating-gate layer,so that the memory window is effectively enhanced.The charge transfer mechanism between the active layer and the floating-gate layer is studied in detail.The tunneling layer of polysilicon floating-gate OFETM is optimized,and the optimized device has a thickness of 85 nm.A maximum memory window of 25.86 V can be obtained at a programming/erasing voltage of?80 V/0.1 s,I_on/off ratio is 10² and the retention time can be up to 10³ s.2.A double floating-gate organic field-effect transistor memory with Poly-Si+CQDs as the charge trapping layer is designed and fabricated,whose structure is n⁺-Si/Si O₂/Poly-Si+CQDs/PMMA/pentacene/Au.The novel structure is proposed to solve the problem that the charge trapped by the floating-gate leaks laterally when the thickness of the tunneling layer of the single floating gate device is reduced,resulting in the decrease of the retention characteristics.The nanoparticles are used to modify the polysilicon surface to form a double floating-gate.The cooperative effect of the two materials can improve the retention characteristics of the device and enlarge the memory window.The carbon quantum dots synthesized by a simple one-step microwave-assisted hydrothermal method are used as the second floating gate.The sample with tunneling layer thickness being 75 nm can obtain the memory window of42.37 V under the operating voltage of V_P/E=±55 V/0.1 s,and its retention time is up to 10⁴ s.Compared with the single Poly-Si floating-gate device with the same tunnel layer thickness,the memory window of the double floating-gate device is increased by36.5%and the retention time is improved by two orders of magnitude.Moreover,the threshold voltage of the device changes obviously under different programming/erasing conditions,so that it has the potential to realize large capacity and multilevel storage.3.An organic field-effect transistor memory with CQDs/PVP composite nanostructure as charge trapping layer is designed and fabricated,whose structure is n⁺-Si/Si O₂/CQDs+PVP/pentacene/Au.Limited by the energy barrier between PVP and pentacene LUMO level,an organic field-effect transistor memory with a single PVP as charge trapping layer has slow erasing speed and small memory window.In order to solve the problem,a kind of memory taking CQDs/PVP composite nanostructure as charge trapping layer is fabricated.In the experiment,carbon quantum dots with excellent electron-withdrawing characteristics are used to dope PVP to construct CQDs/PVP composite nano charge trapping layer.Through the synergistic effect of the two materials,the device can be erased without illumination and increasing the operating voltage.The mechanism of the device and the influence of the concentration of doped carbon quantum dots in PVP layer on the storage characteristics of the device are studied.By optimizing the concentration of doped carbon quantum dots in PVP layer,the optimal performance can be obtained.The optimized sample can obtain the memory window of 8.41 V under the programming/erasing conditions of(V_P=-60V,0.1 s),(V_E=+60 V,0.3 s).The device shows bidirectional storage characteristics,and the retention time can be up to 10⁴s.