Charge Transport At Interfaces Of Amorphous InGaZnO Thin Film Transistors

Amorphous InGaZnO(a-InGaZnO)is a promising material in thin film transistors(TFTs),because of high current-driving capacity,low power consumption,and uniformity in large-scale fabrication.Amorphous InGaZnO TFTs have been maturely applied in display driving circuits and now are being investigated for sensors and memory chips.Electronic information is powerful for analyzing semiconductor interface in transistors and can reflect actual interface performance when the device is in on-state.Electronic testing has advantages in precision,convenience and can be used in any type of device structure,which is complementary to traditional material characterization.Therefore,in this paper,amorphous InGaZnO thin film transistor was prepared by standardized transistor fabrication technology.The semiconductor/dielectric interface and the semiconductor/metal interface were analyzed by means of electron microscope,carrier transport model and device simulation,and the effect on charge transport mechanism was studied.The main research content,methods and conclusions of this study are as follows:Based on power-law relationship between mobility and gate voltage,the liner transfer(ID-VG)relationship in MOSFET model was modified,and a novel method for InGaZnO device parameter extraction was proposed,and the components in the power-law relationship were obtained,as well as the threshold voltage.It is conclusive that the power component increases with decreasing temperature,indicting that a-InGaZnO is more disordered at low temperatures.The results provide a novel method for device parameter extraction in oxide semiconductors.With "Air-gap" device structure,the dielectric interface was investigated.In the comparison of the vacuum dielectric and the SiO2 dielectric,the trap density and the mobility were extracted and compared to reveal the interface influence on electronic hopping.The mobility of the intrinsic a-InGaZnO surface severely degrades with SiO2 dielectric.The reason is that dielectric interface makes the lattice structure at interface more disordered and extends the tail states in band gap.Then,quasi-Fermi level decreases,and a higher energy barrier for electronic hopping is induced,making it more tough for electronic hopping between the quasi-Fermi level and the mobility edge.Finally,the mobility of SiO2 dielectric is reduced.In coplaner structure with channel width/length=1000/20μm,the vacuum dielectric was 70.7 cm2·V-1·s-1.The results can be exploited to design high-performance transistors.Low frequency noise in CAA InGaZnO device with several nanometers was investigated.It reveals that the surface scattering is part of noise origination in CAA structure,which should be concerned in l/f noise.Then a novel 1/f noise model based on the hopping was proposed,and the scattering coefficient extracted is 1.58×106 Vs·C-1.The scattering coefficient is higher with decreasing temperature,because the free electronics are lower when temperature is lower,then the Coulomb scattering between the extended electrons in a-InGaZnO and the trapped charges at the interface is strengthened.The physical model contributes to the development of novel device structures.Metale/a-InGaZnO is crucial in electron injection.The dual-gate devices with Ni/a-InGaZnO contact was pattered with e-beam lithography,photolithography and microscopic analysis of materials.Devices around contact pitch=100 nm were fabricated successfully.A device with 5-nm-thickness InGaZnO film and 40-nm-length channel can be scaled down to contact pitch=90 nm,i.e.,the contact length is 50 nm.The minimum limitation of contact comes from the transfer length in TLM contact model,and the transfer length is 40～50 nm.Further scaling to lower 50 nm results in obvious degradation of on-state current and threshold voltage.In TCAD simulation,the scaling limitation can be further reduced with thinner InGaZnO film,because the transfer length is lower with a stronger depletion of a-InGaZnO in metal/semiconductor contact.The fabrication and analysis methodology can be applied to the device scaling technology.In summary,the physical model established in this study can reflect the interface information of amorphous InGaZnO in thin film transistors and can be analyzed interfacial effects on charge transport in amorphous InGaZnO transistors,including the hopping and scattering.The methodology and results are conducive to the design,fabrication and mechanism exploration of novel amorphous InGaZnO transistors,as well as other oxide semiconductor devices.