| The demand for high-power,high power density and high reliability power devices in the smart grid and electrified transportation becomes urgent.The conventional soldered single-side cooling(SSC)module has been difficult to meet this requirement.In recent years,the continuous development of double-side cooling(DSC)modules has provided the potential solutions in these fields.The DSC module realizes low parasitic inductance,low junction-to-case thermal resistance(Rth-jc)and high reliability by replacing the bonding wires with the large area interconnection,which greatly improves the performance of the power conversion system and accelerates the large-scale application process of wide bandgap semiconductor devices.However,the DSC module is immature.There are few commercial products,and there is no standard packaging structure and packaging process.Especially,the strong-coupling effects in the three-dimensional space of the DSC module cause the imbalance of multi-physical fields easily,which seriously threatens its normal operation.The effective spatial decoupling technology in the three-dimensional space for each physical field is necessary to achieve its safe and efficient operation.The existing research on relevant technologies is few and has great limitations.Therefore,based on silicon/silicon carbide insulated gate bipolar transistor(Si/Si C IGBT)and silicon carbide metal oxide semiconductor field effect transistor(Si C MOSFET),the following researches are carried out in this paper from the aspects of strong-coupling effect,modeling,characterization and packaging optimization:The vertical current path,compact structure and double cooling path of the DSC module form horizontal and vertical strong-coupling effects in space,which seriously affects the balance of multi-physical fields and long-term reliability.This paper analyzes strong-coupling effects of the electromagnetic,thermal and mechanical between chips in the horizontal direction and the strong-coupling effects between multilayer structures in the vertical direction.Through finite element simulation,the influence of key factors such as package structure and chip layout on the distribution of electromagnetic,thermal and mechanical characteristics is obtained.The mechanism of the strong-coupling effects between chips to increase the imbalance of electrical,thermal and mechanical characteristics is revealed;through accelerated aging test,the relationship between the over-stress generated by package aging and chip damage is obtained,and the mechanism of early failure of modules caused by the strong-coupling effect between the stack structures is revealed.The above researches and analysis highlight the importance of spatial decoupling technology of DSC module,which provides theoretical support for related technical researches.Circuit-level modeling and simulation of devices are important for packaging optimization and circuit design.Especially,the DSC module with multi-physical quantities,multi-variable and characteristics distribution difference,requires a modeling method that takes into account the accurate and speed of chip-level and system-level simulation.In this paper,a novel behavioral model is proposed.The interpolation fitting method is proposed to model the static I-V characteristics,parasitic capacitance characteristics,tail current characteristics,temperature sensitive characteristics and force sensitive characteristics of the device.The extraction method of C-V characteristics with a wide voltage range is proposed based on the transient waveforms to accurately simulate the abrupt voltage under high voltage.The temperature and pressure inputs are introduced to change the device characteristics.The static and dynamic tracking capabilities of the above simulation methods under different gate voltage,gate resistance,bus voltage,load current,junction temperature and pressure conditions are verified through experiments.The linear and low-order interpolation fitting method greatly reduces the complexity of the model and improves the simulation convergence and speed.The spatial strong-coupling of each physical field in DSC module makes it difficult to characterize the electrical,thermal and mechanical characteristics of the module,which hinders its condition evaluation and packaging optimization design.Thus,a four-layer printed circuit board(PCB)Rogowski coil is proposed to realize independent measurement of each chip by PCB designing.With consistent impedance and symmetrical double-layer return loop designs,experiments verify the high accuracy,high bandwidth and anti-interference capability of this method.To solve the problem that the measurement conditions and results of the transient dual interface method in the DSC module are various,the inherent implication of the Rth-jc on both sides of the DSC module is analyzed from the theory of the transient thermal model.The conclusion that the measured Rth-jc is only 50%of the real value,is obtained by changing the external cooling conditions and the internal packaging structure by finite element simulation.The theoretical and simulation results are verified in the thermal resistance experiment.A new definition method of Rth-jc for condition evaluation is also proposed.A calculation method of equivalent stress is also proposed to solve the problem that the internal stress distribution of the DSC module in normal operation cannot be measured.Based on the thermal resistance expression,the thermal resistance parameters and current parameters are converted into the pressure.The direct relationship between pressure and junction-to-case temperature difference is obtained to indirectly calculate the stress.In order to reduce the imbalance of current,temperature and stress caused by the strong-coupling effects in three-dimension space,the analytical model of the flux linkage between the branches of the DSC module is built.Then the chip space position constraints to ensure the current balance between the branches are obtained.The rotational symmetric optimal layout schemes are proposed.Based on the device model proposed above,combined with the finite element simulation model,a transient and steady-state co-simulation is proposed.The accurate model verifes the effects of current sharing,temperature sharing and stress sharing after layout optimization.Finally,based on the characterization method mentioned above,the distributions of current,temperature and stress between chips are measured,which fully proves that the proposed layout optimization has great advantages in improving the electrical,thermal and stress balance characteristics of the DSC module.The strong-coupling mechanism in three-dimension space of the DSC module revealed in this paper,as well as the spatial decoupling methods in terms of the modeling idea,characterization and layout optimization,improves its safe and stable operation capability and promotes the large-scale application process of DSC module packaging technology. |