Research On Key Technologies Of Battery Monitoring And Management Integrated Circuit For Electric Vehicles

The use of electrification technology to solve the carbon balance problem is the main means of today’s society to deal with environmental protection and energy crisis,and the core of the more sustainable electrification technology now realized is new energy vehicles,which has attracted the attention of the world.Battery management system(BMS)has broad market demand and development prospects in all fields of new energy,especially in the field of new energy vehicles,BMS is the key to ensuring its performance and reliability.The battery monitoring integrated circuit(BMIC)is mainly used for accurately sense various data of the battery cells,ensure the health of the lithium battery,and improve the overall reliability in the BMS.However,the core technology of this type of chip is currently still mastered by foreign high-end integrated circuit design companies.Aiming at the technical gaps in related fields,this thesis studies the key technologies of high-precision battery monitoring and management system chips,analyzes its architecture and module composition,and mainly focuses on high-voltage integrated circuit design technology,high-precision,lowtemperature drift voltage reference technology,high-voltage multi-channel battery cell acquisition technology and high anti-interference stacked daisy chain technology are studied,and a high-precision 16-channel battery monitoring and management system chip is proposed.For each module in the chip,the main results achieved are:1.A high-voltage low-power voltage and current reference for power management is implemented in proposed BMIC.The circuit can withstand 8 V to 80 V input voltage and regulate 5 V voltage for other blocks,with the capability of current bias,over-current protection(OCP)and over-temperature protection(OTP).The output voltage varies by 33mV over an input voltage range of 8 V to 80 V.Furthermore,current consumption is only 6.01 μA to 15.78 μA at an input voltage of 8 V to 80 V at room temperature.2.Two high-precision,high-order curvature-compensated bandgap voltage reference(BGR)is proposed for use in BMIC.The first proposed circuit utilizes the exponential characteristics of the base current and the resistance between bases of bipolar transistors to perform corrections.The curvature of subthreshold-operating MOSFETs is considered to further compensate for high-order temperature effects over a wide temperature range of 170℃.The line regulation is approximately 0.31 mV/V in a supply voltage range of 4.26.0 V.With 4-bit trimming,a temperature coefficient of 4.6 ppm/℃ is obtained in the range of-40 to 130℃.The collector currents of bipolar junction transistor(BJT)pairs with different ratios and temperature characteristics can cause greater nonlinearities in ΔVEB.The second proposed BGR circuit additionally introduces high-order curvature compensation in the generation of ΔVEB,such that it presents high-order temperature effects complementary to VEB.The proposed BGR generates a 1.193 V reference voltage with a temperature coefficient of 2.9 ppm/℃ in the range of-40 to 105℃.The line sensitivity is 0.04%/V when supply voltage varies from 4.0 to 6.0V.3.A 16-channel high-voltage multiplexer structure is proposed,and a multiplex drive structure is designed to control the high-voltage switch to avoid the quiescent current from affecting the measurement accuracy.In order to ensure the measurement accuracy,a 16-bit incremental sigma-delta structure is used to achieve acquisition.4.Based on the SPI communication protocol and the Manchester encoding protocol,a twowire daisy chain interface circuit is proposed to replace the traditional four-wire currentmode daisy chain interface circuit,which improves the anti-interference ability of the circuit and improves the reliability and application of the chip.The BMIC chip proposed in this thesis is designed in a 0.18 μm high-voltage BCD process,with an overall size of 3.0 mm×3.0 mm and a CQFP-64 package.To test the chip,the upper computer program and the daughter-mother test PCB circuit board are also specially designed for the BMIC.The related research results of this thesis provide a systematic explanation for the design of BMIC,and have accumulated a certain design experience,which lays the foundation for the subsequent work.