| In the space electronic system,the lifetime of lithium battery pack is the bottleneck of the whole space station’s operating life.We need battery management system(BMS)to monitor the lithium battery pack’s real-time information,manage the pack and balance the different cells of the pack because of the state mismatch between the different single cell.The lithium BMS which could raise the pack lifetime,reliability and security is becoming a research hotspot of electronic engineers.Battery monitor SoC,which could provide the real-time cell voltage and temperature to the main control MCU and answer the MCU to protect and manage the battery system,is the crucial part in the BMS.As a result,the chip’s performance determines the validity of the whole BMS.This dissertation focuses on the battery monitor SoC research and design.The main work is as follows:According to the space electronic system’ s requirements,The whole architecture of the battery monitor SoC is designed.Besides,the cascade structure with detailed communication protocol between the multi-chip and main control MCU is also presented.On this basis,this dissertation finished the design of LDO,bandgap voltage reference circuit,incremental ∑△ADC,HV MUX,temperature sensor and over-temperature protection circuit.To fulfill the requirement of low temperature drift,a new structure of bandgap voltage reference is applied,which combines the second-order temperature compensation circuit and trim circuit to realize the low temperature coefficient and a precision DC value of the reference voltage.To increase the precision of the battery voltage and temperature measurement with the low power consumption,a incremental ∑△ ADC which includes a second-order modulator and the corresponding second-order CIC filter is designed in this dissertation.Based on the over-sampling technology and FIR filter we achieved more precision measurement results of the battery’s voltage and temperature under the noise environment.A HV MUX is designed and the ADC is reused in this dissertation which help to maintain the consistency of cell voltage and temperature sampling and save the chip area.Daisy chain serial communication circuit and communication protocolsare designed in this dissertation,which enables multiple monitor SoC to cascade by current mode.At the meantime,this structure avoids the isolation problem under the high voltage environment and reduce the requirements of the HV device.According to the space application requirements,a radiation harden logic library and parts of the device PDK are designed based on 0.18μm 1P3M BCD process.Different hardening methods are used for different registers in this dissertation.For control register,dice structure,TMR and calibration algorithm are used to harden the circuit.For data register only calibration algorithm is used.The radiation performance is tested and the result shows that the total dose tolerance is up to 100k Rad(si)and the single event tolerance is up to 75Mev.cm2/mg.As a result,reliability of the battery monitor SoC is mostly improved in space radiation environment.The battery monitor SoC is realized using 0.18μm 1P3M BCD process.The area of the chip is 4.5mm× 3.95mm.The test results of this chip show that the low voltage supply could provide the analog and digital voltage supply over a wide range,the temperature coefficient of reference voltage is 8.7ppm/℃ and the absolute offset of DC voltage value is less than 5mV.The ADC conversion precision achieves 11.5 bit.The high voltage cascade communication is correct and safe and the communication clock frequency is up to 1MHz.The whole SoC stand-by current consumption is 10μA,the ADC’s current consumption is 0.85mA,and the communication circuit maximum current consumption is 3.95mA.All performance meet the design goal well. |