Multi-mode Field Effect Transistor And Logic-in-Memory Based On Ambipolar Two-Dimensional Materials

Since the silicon-based transistors,integrated circuit technology has been innovated and developed followed the Moore’s Law,which has promoted the rapid development of electronics-information industry.However,the increased power consumption with the devices’size scaling-down have limited the development of traditional silicon-based chips（Moore’s law failure）.In addition,the problems of speed mismatch and transmission power consumption of the von Neumann computing architecture with physically separated processing and memory units,have become increasingly prominent.These bottlenecks limited the development of modern electronic equipment for intelligent,lightweight,high-speed information transmission.It is urgently desired to explore new generation of material systems and device architectures to guide the semiconductor industry for future.Two-dimensional（2D）materials,ascribing to atomic thickness nature,show great potential in breaking the size reduction bottleneck in silicon-based devices.And the easy electrostatic control properties of 2D materials also enable the realization of smart computing-in-memory devices,with direct operation of computing tasks in memory units,to eliminate the delay and energy consumption issues caused by data transmission（known as“Memory wall”）.In this work,I systematically study the relationship between microstructure and physical properties of two-dimensional field effect transistor（FET）,reveal the hidden structural shortcomings,and design a high-performance reconfigurable FET by introducing contact gate.Based on a new storage mechanism,a multi-mode device with charge trapping and field regulating units is proposed.Finally,I study the application potential of the new device in reconfigurable logic-in-memory circuits.The main research results are summarized as follows:（1）To explore the fundamental reasons for the limited performance（low carrier mobility and high subthreshold swing）of 2D global back-gate FET,I systematically study the internal relations between device performance and device structure,contact interface,contact doping.It is shown that the dependance of contact resistance on global back-gate is the root of the problem that limits the charge injection efficiency and switching characteristics of the device.Therefore,an additional contact gate is induced to independently tune the doping level and polarity of contact region.When a high contact gate voltage is induced in the device,the contact region is always kept at highly doped condition,and the high carrier injection efficiency can be maintained during all operation conditions.As the result,high mobility（WSe₂ RFET p:89.8cm²/（V·s）,n:29.1 cm²/（V·s））and low subthreshold swing（WSe₂ RFET p:67 mV/dec,n:81 mV/dec）are observed.Moreover,the flexible control on the doping polarity of contact region enables the remodeling and switching of the achieved unipolar FETs between p-type mode and n-type mode.（2）I report a multi-mode floating-gate field-effect transistor（MFGFET）based on 2D van der Waals heterostructure.The coexistence of charge trapping and field regulating units in MFGFET enables reconfigurable memory and reconfigurable transistor with optimized properties to be realized in the same unit.And the MFGFET device effectively reduce programming voltage and improve the current ratio of write and erase state.When operating as a non-volatile memory,the device can be switched between p-type and n-type memory,and exhibits a high erase/program ratio（>10⁷）.When operating as an FET,the device can be switched between p-type and n-type modes,and exhibits a high on/off current ratio（>10⁷）and a steep subthreshold swing（64 mV/dec）.（3）Benefiting from the reconfigurable multiple operating modes of MFGFET,the reconfigurable logic-in-memory circuits are realized.In detail,I utilize the property of MFGFET devices that can be programmed between n-type/p-type FETs to construct a CMOS circuit.The obtained voltage gain is up to 197(V_DD=1 V),and the noise margin low（NM_L）and noise margin high（NM_H）are 0.44 V_DD and 0.47 V_DD,respectively.Using the reconfigurable non-volatile memory modes of MFGFET devices,I achieved the linear（NOR,RNIMP,NIMP,AND,NAND,IMP,RIMP and OR）logic gates with in-situ storage,nonlinear logic functions（XNOR,XOR）and a half adder circuit with high device efficiency.The study provides important device prototype for the development of next-generation energy-efficient and high density integrated intelligent electronic chips.