Research On Reliability Of HgCdTe Large Format Infrared Focal Plane Detector

Mercury cadmium telluride(HgCdTe)infrared focal plane(IRFPA)detector has the advantages of wide band coverage,high sensitivity and so on.It is the first choice for infrared detection in aerospace remote sensing and astronomical science.With the increasing spatial resolution of infrared detection and imaging,the scale of infrared detector is expanding,but the reliability problem caused by its low temperature thermal mismatch is becoming more and more serious.For this reason,this paper focuses on the research on the reliability techniques of surface shape correction and low thermal stress structure design of large array chips,as follows:1.The structure optimization design of large array infrared focal plane detector is realized.By optimizing the structure size of the detector and selecting the material parameters reasonably,the stress concentration area is reduced,thus the stress size is adjusted.In the actual design of the chip,the actual effective range of the photosensitive element distribution is adjusted to weaken the adverse effect on the photosensitive element distribution area due to excessive stress concentration.According to the difference of detector substrate material and substrate material,the packaging structure is optimized,the structural reliability of the large format array HgCdTe detector based on Si and SiC substrate is enhanced..The problems such as excessive stress on chip edge and quadrangle region,large strain in central region and easy failure in low temperature environment are improved.After 100 cycles of high and low temperature,the response rate,non-uniformity and blind element rate of 2kx2 k focal plane detector have not changed.2.The surface correction of the readout circuit of infrared focal plane detector is studied.By using the balanced structure of deformation compensation and the growth of stress film,a correction method for the readout circuit of infrared focal plane detector is established.The balanced structure is made of silicon readout circuit and correction sheet bonded DW-3 low temperature epoxy adhesive.After the optimization of the structure,the shape variable of the readout circuit can be reduced from 13?m to less than 3?m,After the silicon readout circuit and detector chip are welded back,2kx2 k focal plane detector bump connection rate reaches 99%.Aluminum oxide stress film was grown on the back of the readout circuit by atomic layer deposition.41mm×38mm×0.48 mm ROIC PV value is better than 1.5 ?m.The surface smoothness of the detector and the connection rate of reverse welding are improved effectively.3.A stress adjusting device for HgCdTe infrared focal plane device chip was designed.Free adjustment of tension and compression stress is achieved.The stress device can be installed inside the dewar to provide the desired low temperature environment for the detector chip and is highly detachable.The device can directly exert stress on the device chip,which provides a basic experimental condition for further research on the influence of external stress on the optoelectronic performance of the device chip.The effect of external stress on the response spectrum of HgCdTe long wave devices was studied.The response spectra of the device chip under different stress states are obtained.According to the analysis of energy band theory and the test results of response spectrum,the change rule of band gap width of HgCdTe material under compressive stress and tensile stress respectively can be obtained.The effect of external stress on the dark current of HgCdTe long wave devices was studied.The dark current of the device chip under different stress states is obtained.According to the finite element analysis,the stress level at the chip end and edge is high,and the dark current test results can show that the performance of the device may be completely damaged when the compressive stress level is too high.The tension stress at the same stress level has less impact on the dark current.The research provides valuable experience for stress analysis of large array focal plane detector chips.