The Study Of Enhancement-Mode GaN Power Device Based On Atomic Layer Deposition And Atomic Layer Etching

In recent years,as the silicon-based power devices approaching the theoretical performance limit,the third-generation semiconductor represented by Gallium Nitride(Ga N)material with wide bandgap has shown great potential in the applications of high-power devices because of their excellent physical properties such as high electron mobility,high critical breakdown electric field,and high thermal conductivity.However,there are still some constraints that need to be addressed in present Ga N-based power devices.First of all,unlike the high-quality native oxide on the surface of silicon substrate,the epitaxial growth of Al Ga N/Ga N heterojunction and the device fabrication process will induce a lot of trap states to seriously degrade the performance of power device.Secondly,the traditional high electron mobility transistor(HEMT)with Schottky gate has a large gate leakage current,greatly limiting the range of operation voltage.Thirdly,the Ga N-based HEMT is intrinsically normally-on due to the existence of the high-density two-dimensional electron-gas(2DEG)at the heterostructure interface which induced by spontaneous polarization and piezoelectric polarization,also known as depletion mode(D-mode).Thus,a large negative gate voltage is needed to turn-off the device,leading to a complicated driver circuit design.Lastly,dielectric breakdown and current collapse under the high drain bias at OFF-state significantly reduce the reliability of power device.In order to solve these problems,this work mainly includes the following parts:Firstly,the recessed-gate structure has been adopted to realize the normally-off operation,also known as enhancement mode(E-mode).The dry etching process for recessedgate channel has been optimized and the atomic layer etching(ALE)technique with low etching rate is used to reduce the etching damage.A positive shift of threshold voltage has been achieved by reducing the thickness of Al Ga N barrier layer to decrease the 2DEG density.The metal-oxide-semiconductor(MOS)structure has been formed by integrating the high-?dielectric using atomic layer deposition(ALD)to suppress the gate leakage current and passivate the trap states effectively.The fabricated devices have realized the excellent transfer and output characteristics,low interface states density,high breakdown voltage,large-area uniformity,as well as thermal stability simultaneously.Secondly,dynamic reliability of Ga N devices has been characterized and the optimization mechanism of field plate has been analyzed.The main reason of current collapse has been discussed,then the surface passivation and field plate have been adopted to suppress the carrier trapping effect driven by high electric field to improve the dynamic reliability.The improvement on dynamic performance of field plate has been proved by comparison of devices with/without field plate,and device simulation of transverse electric field distribution is applied to analyze the optimization mechanism.The difference between D-mode and E-mode devices under identical measurement setup has been further compared and the theoretical explanation has been proposed.The breakdown characteristics of devices with field plate have also been characterized and the high-voltage stability has been demonstrated.Thirdly,characterization and analysis of 1/f low-frequency noise have been carried out.Different types and their origins of the noise in the circuit have been discussed.The low-frequency noise in linear region and saturation region of both D-mode and E-mode devices have been characterized,respectively.The parameter model and mechanism evolution of 1/f noise at different electric field for both devices have been analyzed systematically.Also,the measurement temperature has been elevated to study the temperature-dependence of 1/f low-frequency noise.Graphene floating field plate has also been adopted to improve the overall performance.In this work,high-performance E-mode Ga N device has been successfully realized by recessed-gate structure using atomic layer etching in together with high-? dielectric using atomic layer deposition.Comprehensive electrical characterizations have been carried out,showing excellent on-state performance and reliability for potential applications in power electronics.By comparing the performance of D-mode and E-mode devices,the physical mechanism has been studied systematically,which is of great significance to further performance optimization.