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Architecture-aware hard-real-time scheduling on multi-core architectures

Posted on:2015-06-27Degree:Ph.DType:Dissertation
University:Southern Illinois University at CarbondaleCandidate:Shekhar, MayankFull Text:PDF
GTID:1478390020951242Subject:Electrical engineering
Abstract/Summary:
The increasing dependency of man on machines have led to increase computational.;load on systems. The increasing computational load can be handled to some extent.;by scaling up processor frequencies. However, this approach has hit a frequency.;and power wall and the increasing awareness towards green computing discourages.;this solution. This leads us to use multi-core architectures. Due to the same.;reason, real-time systems are also migrating from single-core towards multi-core.;systems. While multi-core systems provide scalable high computational power,;they also expose real-time systems to several challenges. Most of these.;challenges hamper the key property of real-time systems, i.e., predictability.;In this work, we address some challenges imposed by multi-core architectures on.;real-time systems. We propose and evaluate several scheduling algorithms and.;demonstrate improved predictability and performance over existing methods. A.;unifying them in all our algorithms is that we explicitly consider the effects.;of architectural factors on the scheduling and schedulablity of real-time.;programs.;As a case study, we use Tilera's TilePro64 platform as an example multi-core.;platform and implement some of our algorithms on this platform. Through this.;case study, we derive several useful conclusions regarding performance,;predictability and practical overheads on a multi-core architecture.
Keywords/Search Tags:Multi-core, Real-time, Systems, Scheduling
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