Design of asynchronous sequential circuits using pass transistors

The vast majority of sequential circuits currently implemented with Very Large Scale Integrated (VLSI) circuit technology are designed using synchronous design theory. Asynchronous design theory can often result in better solutions for certain applications. Asynchronous sequential circuits are not widely used in VLSI because the complex design procedures are not well understood. There are also design complications introduced by critical races and hazards which do not affect synchronous circuits.; Even though synchronous circuits are widely used, they are also subject to serious design considerations, especially when implemented in VLSI technologies. Metastable states introduced by interfacing a synchronous circuit with asynchronous inputs, clock skewing introduced by delays in the clock distribution network and clock edge related peak power transients are just three design obstacles related to synchronous circuits.; Pass transistors have been studied over the past several years resulting in practical high speed and high density combinational logic circuits. Properties of pass transistors often allow the resulting combinational logic structures to have advantages over classically designed circuits. Sequential circuits have been derived using pass transistors as the combinational logic feeding synchronous storage cells. Pass transistor logic, however, has not been applied to the design of asynchronous sequential circuits.; In this dissertation, new design methods have been developed for asynchronous sequential pass transistor circuits which result in circuits which are hazard and critical race free and which have added degrees of freedom for the input signals. Moreover, the design procedures are straightforward and easy to implement. The resulting VLSI circuits are compact and fast with architectures which can be automated for programmatic generation of structured layouts.; This dissertation presents the following: (1) Development of fundamental pass transistor principles for asynchronous sequential circuits. (2) Proposals for four unique architectures. (3) Development of new design procedures. (4) A structured architecture for programmatic layout generation.